SH7040 Datasheet, PDF (760/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

22.9 Flash Memory Emulation in RAM
Making a setting in the RAM emulation register (RAMER) enables part of RAM to be overlapped
onto the flash memory area so that data to be written to flash memory can be emulated in RAM in
real time. After the RAMER setting has been made, accesses can be made from the flash memory
area or the RAM area overlapping flash memory. Emulation can be performed in user mode and
user program mode. Figure 22.16 shows an example of emulation of real-time flash memory
programming.
Start emulation program
Set RAMER
Write tuning data to overlap
RAM
Execute application program
No
Tuning OK?
Yes
Release RAMER
Write to flash memory emulation
block
End of emulation program
Figure 22.16 Flowchart for Flash Memory Emulation in RAM
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