SH7040 Datasheet, PDF(377/923 Page) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

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SH7040 Datasheet, PDF (377/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

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PWM mode

Select counter clock

1

Select counter clear source 2

Select waveform output level 3

Set TGR

4

Select PWM mode

5

Start counting

6

PWM mode

Figure 12.24 Procedure for Selecting the PWM Mode

PWM Mode Operation ExamplesâPWM Mode 1 (Figure 12.25): A TGRA register compare-

match is used as a TCNT counter clear source, the TGRA register initial output value and output

compare output value are both 0, and the TGRB register output compare output value is a 1. In this

example, the value established in the TGRA register becomes the period and the value established

in the TGRB register becomes the duty cycle.

TCNT value

TGRA

Counter cleared by TGRA compare match

TGRB

H'0000

TIOCA

Figure 12.25 PWM Mode Operation Example (Mode 1)

Time

339

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