SH7040 Datasheet, PDF(724/923 Page) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

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SH7040 Datasheet, PDF (724/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

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22.2.4 Flash Memory Emulation in RAM

Emulation should be performed in user mode or user program mode. When the emulation block

set in RAMER is accessed while the emulation function is being executed, data written in the

overlap RAM is read.

â¢ User Mode

â¢ User Program Mode

SCI

Flash memory

RAM

Application program

Overlap RAM (Emulation is executed

using data written to RAM)

Emulation block

Figure 22.5 Emulation

When overlap RAM data is confirmed, the RAMS bit is cleared, RAM overlap is released, and

writes should actually be performed to the flash memory.

When the programming control program is transferred to RAM, ensure that the transfer

destination and the overlap RAM do not overlap, as this will cause data in the overlap RAM to

be rewritten.

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