82801CA Datasheet, PDF (82/521 Pages) Intel Corporation – I/O Controller Hub 3-S (ICH3-S)

Functional Description
5.2.4 Serial EEPROM Interface
The serial EEPROM stores configuration data for the ICH3 integrated LAN Controller and is a
serial in/serial out device. The LAN Controller supports a 64-register or 256-register size
EEPROM and automatically detects the EEPROM’s size. The EEPROM should operate at a
frequency of at least 1 MHz.
All accesses, either read or write, are preceded by a command instruction to the device. The
address field is six bits for a 64-register EEPROM or eight bits for a 256-register EEPROM. The
end of the address field is indicated by a dummy zero bit from the EEPROM, which indicates the
entire address field has been transferred to the device. An EEPROM read instruction waveform is
shown in Figure 5-5.
Figure 5-5. 64-Word EEPROM Read Instruction Waveform
EE_SHCLKK
5.2.5
EE_CS
EE_DIN
EE_DOUT
A₅
A₄
A₃
A₂
AA₁₀ A₀
READ OP code
D₁₅
D₀
The LAN Controller performs an automatic read of seven words (0h, 1h, 2h, Ah, Bh, Ch and Dh) of
the EEPROM after the deassertion of Reset.
CSMA/CD Unit
The ICH3 integrated LAN Controller CSMA/CD unit implements both the IEEE 802.3 Ethernet
10 Mbps and IEEE 802.3u Fast Ethernet 100 Mbps standards. It also supports the 1 Mbps Home
Phone line Networking Alliance (HomePNA*) specification effort. It performs all the CSMA/CD
protocol functions such as transmission, reception, collision handling, etc. The LAN Controller
CSMA/CD unit interfaces to the 82562ET/EM 10/100 Mbps Ethernet or the 82562EH 1 Mbps
HomePNA*-compliant LAN Connect component through the ICH3’s LAN Connect interface
signals.
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Intel^® 82801CA ICH3-S Datasheet