82801CA Datasheet, PDF (158/521 Pages) Intel Corporation – I/O Controller Hub 3-S (ICH3-S)

Functional Description
by the SMBus rules associated with collision detection. It delays starting a message until the
bus is idle, and detects collisions. If a collision is detected the ICH3 waits until the bus is idle,
and tries again.
2. WARNING: It is important the BIOS clears the SECOND_TO_STS bit, as the alerts will
interfere with the LAN device driver from working properly. The alerts reset part of the D110
and would prevent an OS’s device driver from sending or receiving some messages.
3. A system that has locked up and cannot be restarted with power button press is assumed to
have broken hardware (bad power supply, short circuit on some bus, etc.), and is beyond
ICH3’s recovery mechanisms.
4. A spurious alert could occur in the following sequence:
— The processor has initiated an alert using the SEND_NOW bit
— During the alert, the THRM#, INTRUDER# or GPI[11] changes state
— The system then goes to a non-S0 state.
Once the system transitions to the non-S0 state, it may send a single alert with an incremental
SEQUENCE number.
5. An inaccurate alert message can be generated in the following scenario
— The system successfully boots after a second watchdog Timeout occurs.
— PWROK goes low (typically due to a reset button press) or a power button override
occurs (before the SECOND_TO_STS bit is cleared).
— An alert message indicating that the processor is missing or locked up is generated with a
new sequence number.
Table 5-50 shows the data included in the Alert on LAN messages.
Table 5-50. Alert on LAN* Message Data
Field
Comment
Cover Tamper Status
1 = This bit will be set if the intruder detect bit is set (INTRD_DET).
Temp Event Status
1 = This bit will be set if the ICH3 THERM# input signal is asserted.
CPU Missing Event Status 1 = This bit will be set if the processor failed to fetch the first instruction.
TCO Timer Event Status
1 = This bit is set when the TCO timer expires.
Software Event Status
1 = This bit is set when software writes a 1 to the SEND_NOW bit.
Unprogrammed FWH Event 1 = First BIOS fetch returned a value of FFh, indicating that the FWH has not
Status
yet been programmed (still erased).
GPIO Status
1 = This bit is set when GPIO[11] signal is high.
0 = This bit is cleared when GPIO[11] signal is low.
An event message is triggered on an transition of GPIO[11].
SEQ[3:0]
This is a sequence number. It will initially be 0, and will increment each time the
ICH3 sends a new message. Upon reaching 1111, then the sequence number
will roll over to 0000. MSB (SEQ3) sent first.
System Power State
00 = G0, 01 = G1, 10 = G2, 11 = Pre-Boot. MSB sent first
MESSAGE1
Will be the same as the MESSAGE1 register. MSB sent first.
MESSAGE2
Will be the same as the MESSAGE2 register. MSB sent first.
WDSTATUS
Will be the same as the WDSTATUS register. MSB sent first.
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Intel^® 82801CA ICH3-S Datasheet