82801CA Datasheet, PDF (297/521 Pages) Intel Corporation – I/O Controller Hub 3-S (ICH3-S)

LPC I/F Bridge Registers (D31:F0)
9.1.35
FUNC_DIS—Function Disable Register (LPC I/F—D31:F0)
Offset Address: F2h
Default Value: 00h
Lockable:
No
Attribute:
Size:
Power Well:
R/W
16 bits
Core
Bit
Description
15:11
10
9
8
7
6
5
4
3
2
1
0
Reserved.
D29_F2_Disable—R/W. Software sets this bit to disable the USB 1.1 Controller #3 function. BIOS
must not enable I/O or memory address space decode, interrupt generation, or any other
functionality of functions that are to be disabled.
0 = USB 1.1 Controller #3 is enabled.
1 = USB 1.1 Controller #3 is disabled.
D29_F1_Disable—R/W. Software sets this bit to disable the USB 1.1 Controller #2 function. BIOS
must not enable I/O or memory address space decode, interrupt generation, or any other
functionality of functions that are to be disabled.
0 = USB 1.1 Controller #2 is enabled.
1 = USB 1.1 Controller #2 is disabled.
D29_F0_Disable—R/W. Software sets this bit to disable the USB 1.1 Controller #1 function.BIOS
must not enable I/O or memory address space decode, interrupt generation, or any other
functionality of functions that are to be disabled.
0 = USB 1.1 Controller #1 is enabled.
1 = USB 1.1 Controller #1 is disabled.
Reserved.
D31_F6_Disable—R/W. Software sets this bit to disable the AC’97 modem controller function.
BIOS must not enable I/O or memory address space decode, interrupt generation, or any other
functionality of functions that are to be disabled.
0 = AC’97 Modem is enabled.
1 = AC’97 Modem is disabled.
D31_F5_Disable—R/W. Software sets this bit to disable the AC’97 audio controller function. BIOS
must not enable I/O or memory address space decode, interrupt generation, or any other
functionality of functions that are to be disabled.
0 = AC’97 audio controller is enabled.
1 = AC’97 audio controller is disabled.
Reserved.
D31_F3_Disable—R/W. Software sets this bit to disable the SMBus Host Controller function. BIOS
must not enable I/O or memory address space decode, interrupt generation, or any other
functionality of functions that are to be disabled.
0 = SMBus controller is enabled.
1 = SMBus controller is disabled.
Reserved.
D31_F1_Disable—R/W. Software sets this bit to disable the IDE controller function. BIOS must not
enable I/O or memory address space decode, interrupt generation, or any other functionality of
functions that are to be disabled.
0 = IDE controller is enabled.
1 = IDE controller is disabled.
SMB_FOR_BIOS—R/W. This bit is used in conjunction with bit 3 in this register.
0 = No effect.
1 = Allows the SMBus I/O space to be accessible by software when bit 3 in this register is set. The
PCI configuration space is hidden in this case. Note that if bit 3 is set alone, the decode of both
SMBus PCI configuration and I/O space will be disabled.
NOTE: Software must always disable all functionality within the function before disabling the configuration
space
Intel^® 82801CA ICH3-S Datasheet
297