82801CA Datasheet, PDF (18/521 Pages) Intel Corporation – I/O Controller Hub 3-S (ICH3-S)

11.1.12 SID—Subsystem ID Register (USB—D29:F0/F1/F2) ..................... 385
11.1.13 INTR_LN—Interrupt Line Register (USB—D29:F0/F1/F2) ............. 385
11.1.14 INTR_PN—Interrupt Pin Register (USB—D29:F0/F1/F2) .............. 386
11.1.15 SB_RELNUM—Serial Bus Release Number Register
(USB—D29:F0/F1/F2) .................................................................... 386
11.1.16 USB_LEGKEY—USB Legacy Keyboard/Mouse Control
Register (USB—D29:F0/F1/F2) ...................................................... 386
11.1.17 USB_RES—USB Resume Enable Register
(USB—D29:F0/F1/F2) .................................................................... 388
11.2 USB I/O Registers ....................................................................................... 389
11.2.1 USBCMD—USB Command Register ............................................. 390
11.2.2 USBSTA—USB Status Register ..................................................... 393
11.2.3 USBINTR—Interrupt Enable Register............................................. 394
11.2.4 FRNUM—Frame Number Register................................................. 394
11.2.5 FRBASEADD—Frame List Base Address Register........................ 395
11.2.6 SOFMOD—Start of Frame Modify Register.................................... 395
11.2.7 PORTSC[0,1]—Port Status and Control Register........................... 396
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SMBus Controller Registers (D31:F3) ...................................................... 399
12.1 PCI Configuration Registers (SMBus—D31:F3) .......................................... 399
12.1.1 VID—Vendor Identification Register (SMBUS—D31:F3)................ 399
12.1.2 DID—Device Identification Register (SMBUS—D31:F3) ................ 399
12.1.3 CMD—Command Register (SMBUS—D31:F3).............................. 400
12.1.4 STA—Device Status Register (SMBUS—D31:F3) ......................... 400
12.1.5 RID—Revision Identification Register (SMBUS—D31:F3) ............. 401
12.1.6 SCC—Sub Class Code Register (SMBUS—D31:F3)..................... 401
12.1.7 BCC—Base Class Code Register (SMBUS—D31:F3) ................... 401
12.1.8 SMB_BASE—SMBus Base Address Register
(SMBUS—D31:F3) ......................................................................... 401
12.1.9 SVID—Subsystem Vendor ID Register (SMBUS—D31:F2/F4)...... 402
12.1.10 SID—Subsystem ID Register (SMBUS—D31:F2/F4)..................... 402
12.1.11 INTR_LN—Interrupt Line Register (SMBUS—D31:F3) .................. 402
12.1.12 INTR_PN—Interrupt Pin Register (SMBUS—D31:F3) ................... 402
12.1.13 HOSTC—Host Configuration Register (SMBUS—D31:F3) ............ 403
12.2 SMBus I/O Registers ................................................................................... 404
12.2.1 HST_STS—Host Status Register ................................................... 405
12.2.2 HST_CNT—Host Control Register ................................................. 406
12.2.3 HST_CMD—Host Command Register............................................ 407
12.2.4 XMIT_SLVA—Transmit Slave Address Register ............................ 407
12.2.5 HST_D0—Data 0 Register.............................................................. 407
12.2.6 HST_D1—Data 1 Register.............................................................. 407
12.2.7 BLOCK_DB—Block Data Byte Register ......................................... 408
12.2.8 PEC—Packet Error Check (PEC) Register..................................... 408
12.2.9 RCV_SLVA—Receive Slave Address Register .............................. 408
12.2.10 SLV_DATA—Receive Slave Data Register .................................... 409
12.2.11 SMLINK_PIN_CTL—SMLink Pin Control Register ......................... 409
12.2.12 SMBUS_PIN_CTL—SMBus Pin Control Register .......................... 409
12.2.13 SLV_STS—Slave Status Register .................................................. 410
12.2.14 SLV_CMD—Slave Command Register .......................................... 410
12.2.15 NOTIFY_DADDR—Notify Device Address ..................................... 411
12.2.16 NOTIFY_DLOW—Notify Data Low Byte Register .......................... 411
12.2.17 NOTIFY_DHIGH—Notify Data High Byte Register......................... 411
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Intel^® 82801CA ICH3-S Datasheet