82801CA Datasheet, PDF (469/521 Pages) Intel Corporation – I/O Controller Hub 3-S (ICH3-S)

Electrical Characteristics
Table 16-11. Ultra ATA Timing (Mode 3, Mode 4, Mode 5)
Sym
Parameter¹
Mode 3
(ns)
Min Max
Mode 4
(ns)
Min Max
Mode 5
(ns)
Min Max
Measuring
Location
Figure
t80 Sustained Cycle Time (T2cyctyp)
90
t81 Cycle Time (Tcyc)
39
t82 Two Cycle Time (T2cyc)
86
t83 Data Setup Time (Tds)
7
t84 Data Hold Time (Tdh)
5
t85 Data Valid Setup Time (Tdvs)
20
t86 Data Valid Hold Time (Tdvh)
t87 Limited Interlock Time (Tli)
t88 Interlock Time w/ Minimum (Tmli)
6.2
0 100
20
t89 Envelope Time (Tenv)
20 55
t90 Ready to Pause Time (Trp)
100
t91 DMACK setup/hold Time (Tack)
20
t92a
CRC Word Setup Time at Host
(Tcvs)
20
CRC Word Hold Time at Sender
CRC word valid hold time at
t92b _{sender (from DMACK# negation} 6.2
until CRC may become invalid)²
(Tcvh)
STROBE output released-to-
t93 driving to the first transition of
0
critical timing (Tzfs)
Data Output Released-to-Driving
t94 Until the First Transition of Critical 20.0
Timing (Tdzfs)
t95 Unlimited Interlock Time (Tui)
0
Maximum time allowed for output
t96a drivers to release (from asserted
10
or negated) (Taz)
t96b
Drivers to assert or negate (from
released) (Tzad)
0
Ready-to-final-STROBE time (no
t97
STROBE edges shall be sent this
long after negation of DMARDY#)
60
(Trfs)
60
40
25
16.8
57
38
5
4.0
5
4.6
6.7
4.8
6.2
4.8
0 100 0 75
20
20
20 55 20 50
100
85
20
20
6.7
10
6.2
10.0
0
35
6.7
25
0
0
10
10
0
0
60
50
Sender
Connector
End
Recipient 16-10
Connector
Sender
Connector
16-10
Recipient
Connector
16-10
Recipient
Connector
16-10
Sender
Connector
16-10
Sender
Connector
16-10
See Note 2 16-12
Host
Connector
16-12
Host
Connector
16-9
Recipient
Connector
16-11
Host
16-9,
Connector 16-12
Host
Connector
Host
Connector
Device
Connector
Sender
Connector
Host
Connector
See Note 2
Device
Connector
Sender
Connector
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