82801CA Datasheet, PDF (33/521 Pages) Intel Corporation – I/O Controller Hub 3-S (ICH3-S)

Introduction
Compatibility Modules (DMA Controller, Timer/Counters, Interrupt
Controller)
The DMA controller incorporates the logic of two 82C37 DMA controllers, with seven
independently programmable channels. Channels 0–3 are hardwired to 8-bit, count-by-byte
transfers, and channels 5–7 are hardwired to 16-bit, count-by-word transfers. Any two of the seven
DMA channels can be programmed to support fast Type-F transfers.
The ICH3 supports two types of DMA (LPC and PC/PCI). DMA via LPC is similar to ISA DMA.
LPC DMA and PC/PCI DMA use the ICH3’s DMA controller. The PC/PCI protocol allows
PCI-based peripherals to initiate DMA cycles by encoding requests and grants via two PC/PCI
REQ#/GNT# pairs.
LPC DMA is handled through the use of the LDRQ# lines from peripherals and special encodings
on LAD[3:0] from the host. Single, Demand, Verify, and Increment modes are supported on the
LPC interface. Channels 0–3 are 8 bit channels. Channels 5–7 are 16 bit channels. Channel 4 is
reserved as a generic bus master request.
The timer/counter block contains three counters that are equivalent in function to those found in
one 82C54 programmable interval timer. These three counters are combined to provide the system
timer function, and speaker tone. The 14.31818 MHz oscillator input provides the clock source for
these three counters.
The ICH3 provides an ISA-Compatible Programmable Interrupt Controller (PIC) that incorporates
the functionality of two 82C59 interrupt controllers. The two interrupt controllers are cascaded so
that 14 external and two internal interrupts are possible. In addition, the ICH3 supports a serial
interrupt scheme.
All of the registers in these modules can be read and restored. This is required to save and restore
system state after power has been removed and restored to the platform.
Advanced Programmable Interrupt Controller (APIC)
In addition to the standard ISA compatible Programmable Interrupt Controller (PIC) described in
the previous section, the ICH3 incorporates the Advanced Programmable Interrupt Controller
(APIC).
Universal Serial Bus (USB) Controller
The USB controller provides support for the Universal Host Controller Interface (UHCI). This
includes support that allows legacy software to use a USB-based keyboard and mouse. The ICH3 is
USB Revision 1.1 compliant. The ICH3 contains three UHCI USB Host Controllers. Each Host
Controller includes a root hub with two separate USB ports each, for a total of six USB ports. See
Section 5.16, “USB 1.1 Controllers (D29:F0, F1 and F2)” on page 5-172 for details.
Intel^® 82801CA ICH3-S Datasheet
33