82801CA Datasheet, PDF (60/521 Pages) Intel Corporation – I/O Controller Hub 3-S (ICH3-S)

Power Planes and Pin States
3.5
Power Planes for Input Signals
Table 3-5 shows the power plane associated with each input signal, as well as what device drives
the signal at various times. Valid states include:
• High
• Low
• Static: Will be high or low, but will not change
• Driven: Will be high or low, and is allowed to change
• Running: For input clocks
Table 3-5. Power Plane for Input Signals
Signal Name Power Well Driver During Reset
S1
A20GATE
AC_BIT_CLK
AC_SDIN[1:0]
APICCLK
CLK14
CLK48
CLK66
EE_DIN
FERR#
INTRUDER#
IRQ[15:14]
LAN_CLK
LAN_RXD[2:0]
LDRQ[0]#
LDRQ[1]#
OC[5:0]#
PCICLK
PDDREQ
PIORDY
PME#
PWRBTN#
PWROK
RCIN#
REQ[0:5]#
REQ[B:A]#
RI#
LAN_RST#
RSMRST#
RTCRST#
Main I/O
Main I/O
Resume I/O
Main I/O
Main I/O
Main I/O
Main Logic
Resume I/O
Main I/O
RTC
Main I/O
Resume I/O
Resume I/O
Main I/O
Main I/O
Resume I/O
Main I/O
Main I/O
Main I/O
Resume I/O
Resume I/O
RTC
Main I/O
Main I/O
Main I/O
Resume I/O
Resume I/O
RTC
RTC
External Microcontroller
AC’97 Codec
AC’97 Codec
Clock Generator
Clock Generator
Clock Generator
Clock Generator
EEPROM component
CPU
External Switch
IDE
LAN Connect component
LAN Connect component
LPC Devices
LPC Devices
External Pull-Ups
Clock Generator
IDE Device
IDE Device
Internal Pull-Up
Internal Pull-Up
System Power Supply
External Microcontroller
PCI Master
PC/PCI Devices
Serial Port Buffer
External RC circuit
External RC circuit
External RC circuit
Static
Low
Low
Running
Running
Running
Running
Driven
Static
Driven
Static
Driven
Driven
High
High
Driven
Running
Static
Static
Driven
Driven
Driven
High
Driven
Driven
Driven
High
High
High
S3
Low
Low
Low
Low
Low
Low
Low
Driven
Low
Driven
Low
Driven
Driven
Low
Low
Driven
Low
Low
Low
Driven
Driven
Low
Low
Low
Low
Driven
High
High
High
S5
Low
Low
Low
Low
Low
Low
Low
Driven
Low
Driven
Low
Driven
Driven
Low
Low
Driven
Low
Low
Low
Driven
Driven
Low
Low
Low
Low
Driven
High
High
High
3-60
Intel^® 82801CA ICH3-S Datasheet