82801CA Datasheet, PDF (177/521 Pages) Intel Corporation – I/O Controller Hub 3-S (ICH3-S)

Functional Description
5.16.1.3 Queue Head (QH)
Queue heads are special structures used to support the requirements of Control, Bulk, and Interrupt
transfers. Since these TDs are not automatically retired after each use, their maintenance
requirements can be reduced by putting them into a queue. Queue Heads must be aligned on a
16-byte boundary and the elements are shown in Table 5-62.
Table 5-62. Queue Head Block
Bytes
00–03
04–07
Queue Head Link Pointer
Queue Element Link Pointer
Description
Attributes
RO
R/W
Table 5-63. Queue Head Link Pointer
Bit
Description
31:4
Queue Head Link Pointer (QHLP). This field contains the address of the next data object to be
processed in the horizontal list and corresponds to memory address signals [31:4], respectively.
3:2 Reserved. These bits must be written as 0s.
1 ^{QH/TD Select (Q). This bit indicates to the hardware whether the item referenced by the link pointer}
is another TD or a QH.
0 = TD
1 = QH
Terminate (T). This bit indicates to the ICH3 that this is the last QH in the schedule. If there are active
TDs in this queue, they are the last to be executed in this frame.
0
0 = Pointer is valid (points to a QH or TD).
1 = Last QH (pointer is invalid).
Table 5-64. Queue Element Link Pointer
Bit
Description
31:4
Queue Element Link Pointer (QELP). This field contains the address of the next TD or QH to be
processed in this queue and corresponds to memory address signals [31:4], respectively.
3:2 Reserved.
QH/TD Select (Q). This bit indicates to the hardware whether the item referenced by the link pointer
is another TD or a QH. For entries in a queue, this bit is typically set to 0.
1
0 = TD
1 = QH
Terminate (T). This bit indicates to the ICH3 that there are no valid TDs in this queue. When HCD
has new queue entries it overwrites this value with a new TD pointer to the queue entry.
0
0 = Pointer is valid.
1 = Terminate (No valid queue entries).
Intel^® 82801CA ICH3-S Datasheet
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