82801CA Datasheet, PDF (473/521 Pages) Intel Corporation – I/O Controller Hub 3-S (ICH3-S)

Electrical Characteristics
Table 16-17. Miscellaneous Timings
Sym
Parameter
t160 SERIRQ Setup Time to PCICLK Rising
t161 SERIRQ Hold Time from PCICLK Rising
t162 RI#, EXTSMI#, GPI, USB Resume Pulse Width
t163 SPKR Valid Delay from OSC Rising
t164 SERR# Active to NMI Active
t165 IGNNE# Inactive from FERR# Inactive
Min Max Units
Notes Fig
7
ns
0
ns
2
RTCCLK
16-3
16-3
16-5
200
ns
16-2
200
ns
230
ns
Table 16-18. Power Sequencing and Reset Signal Timings
Sym
Parameter
t170 VccRTC active to RTCRST# inactive
t171
V5RefSus active to VccSus3_3, VccSus1_8
active
t172
VccRTC supply active to VccSus supplies
active
t173
VccSus supplies active to LAN_RST# active,
RSMRST# inactive
t174 V5Ref active to Vcc3_3, Vcc1_8 active
t175 VccSus supplies active to Vcc supplies active
t176
Vcc supplies active to PWROK, VRMPWRGD
active
t177
PWROK and VRMPWRGD both active to
SUS_STAT# inactive.
t178 SUS_STAT# inactive to PCIRST# inactive
t179 AC_RST# active low pulse width
t180 AC_RST# inactive to BIT_CLK startup delay
Min
5
0
0
10
0
0
10
32
1
1
162.8
Max Units
-
ms
-
ms
Notes
Fig
16-18
1, 2 16-18
-
ms
3
16-18
-
ms
16-18
16-21
-
ms
1, 2 16-18
-
ms
3
16-18
-
ms
16-18
16-21
34 RTCCLK
16-21
3 RTCCLK
µs
ns
16-21
NOTES:
1. The V5Ref supply must power up before or simultaneous with its associated 3.3 V supply, and must power
down simultaneous with or after the 3.3 V supply. See Section 2.20.3 for details.
2. The associated 3.3 V and 1.8 V supplies are assumed to power up or down ‘together. The difference between
the levels of the 3.3 V and 1.8 V supplies must never be greater than 2.0 V.
3. The VccSus supplies must never be active while the VccRTC supply is inactive. Likewise, the Vcc or
VccLAN, in mobile configurations, supplies must never be active while the VccSus supplies are inactive, and
the Vcc supplies must never be active while the VccLAN supplies are inactive in mobile configurations.
Intel^® 82801CA ICH3-S Datasheet
473