82801CA Datasheet, PDF (512/521 Pages) Intel Corporation – I/O Controller Hub 3-S (ICH3-S)

Register Index
Table A-3. Intel^® ICH3 Variable I/O Registers (Continued)
Register Name
Offset
Datasheet Section and Location
PCM Out Prefetched Index Value
PCM Out Control Register
Mic. In Buffer Descriptor list Base
Address Register
Mic. In Current Index Value
Mic. In Last Valid Index
Mic. In Status Register
Mic In Position In Current Buffer
Mic. In Prefetched Index Value
Mic. In Control Register
Global Control
Global Status
Codec Access Semaphore Register
1Ah
Section 13.2.6, “x_PIV—Prefetched Index Value
Register” on page 13-425
1Bh
Section 13.2.7, “x_CR—Control Register” on
page 13-426
20h
Section 13.2.1, “x_BDBAR—Buffer Descriptor Base
Address Register” on page 13-422
24h
Section 13.2.2, “x_CIV—Current Index Value
Register” on page 13-423
25h
Section 13.2.3, “x_LVI—Last Valid Index Register” on
page 13-423
26h
Section 13.2.4, “x_SR—Status Register” on
page 13-424
28h
Section 13.2.5, “x_PICB—Position In Current Buffer
Register” on page 13-425
2Ah
Section 13.2.6, “x_PIV—Prefetched Index Value
Register” on page 13-425
2Bh
Section 13.2.7, “x_CR—Control Register” on
page 13-426
2Ch
Section 13.2.8, “GLOB_CNT—Global Control
Register” on page 13-427
30h
Section 13.2.9, “GLOB_STA—Global Status Register”
on page 13-428
34h
Section 13.2.10, “CAS—Codec Access Semaphore
Register” on page 13-429
AC’97 Modem I/O Registers at MBAR + Offset
MBAR is set in Section 14.1.11, “MBAR—Modem Base Address Register (Modem—D31:F6)” on
page 14-435
Modem In Buffer Descriptor List Base
Address Register
Modem In Current Index Value
Register
Modem In Last Valid Index Register
Modem In Status Register
Modem In Position In Current Buffer
Register
Modem In Prefetch Index Value
Register
Modem In Control Register
Modem Out Buffer Descriptor List
Base Address Register
Modem Out Current Index Value
Register
Modem Out Last Valid Register
00h
Section 14.2.1, “x_BDBAR—Buffer Descriptor List
Base Address Register” on page 14-439
04h
Section 14.2.2, “x_CIV—Current Index Value
Register” on page 14-439
05h
Section 14.2.3, “x_LVI—Last Valid Index Register” on
page 14-439
06h
Section 14.2.4, “x_SR—Status Register” on
page 14-440
08h
Section 14.2.5, “x_PICB—Position In Current Buffer
Register” on page 14-441
0Ah
Section 14.2.6, “x_PIV—Prefetch Index Value
Register” on page 14-441
0Bh
Section 14.2.7, “x_CR—Control Register” on
page 14-442
10h
Section 14.2.1, “x_BDBAR—Buffer Descriptor List
Base Address Register” on page 14-439
14h
Section 14.2.2, “x_CIV—Current Index Value
Register” on page 14-439
15h
Section 14.2.3, “x_LVI—Last Valid Index Register” on
page 14-439
512
Intel^® 82801CA ICH3-S Datasheet