82801CA Datasheet, PDF (57/521 Pages) Intel Corporation – I/O Controller Hub 3-S (ICH3-S)

Power Planes and Pin States
3.4
Output and I/O Signals Planes and States
Table 3-4 shows the power plane associated with the output and I/O signals, as well as the state at
various times. Within the tables, the following terms are used:
“High-Z”
Tri-state. ICH3 not driving the signal high or low.
“High”
ICH3 is driving the signal to a logic 1
“Low”
ICH3 is driving the signal to a logic 0
“Defined”
Driven to a level that is defined by the function (will be high or low)
“Undefined”
ICH3 is driving the signal, but the value is indeterminate.
“Running”
Clock is toggling or signal is transitioning because function not stopping
“Off”
The power plane is off, so ICH3 is not driving
Note that the signal levels are the same in S4 and S5.
Table 3-4. Power Plane and States for Output and I/O Signal
Signal Name
Power
Plane
During
PCIRST#⁴ /
RSMRST#⁵
Immediately
after
PCIRST#⁴ /
RSMRST#⁵
S1
S3
S4/S5
PCI Bus
AD[31:0]
Main I/O
High-Z
Undefined
Defined
Off
Off
C/BE#[3:0]
Main I/O
High-Z
Undefined
Defined
Off
Off
DEVSEL#
Main I/O
High-Z
High-Z
High-Z
Off
Off
FRAME#
Main I/O
High-Z
High-Z
High-Z
Off
Off
GNT[0:4]#
Main I/O
High
High
High
Off
Off
GNT[A], GNT[5]#/
GNT[B]#
Main I/O
High-Z with
internal pull-
up
High
High
Off
Off
IRDY#, TRDY#
Main I/O
High-Z
High-Z
High-Z
Off
Off
PAR
Main I/O
High-Z
Undefined
Defined
Off
Off
PCIRST#
Resume I/O
Low
High
High
Low
Low
PERR#
Main I/O
High-Z
High-Z
High-Z
Off
Off
PLOCK#
Main I/O
High-Z
High-Z
High-Z
Off
Off
STOP#
Main I/O
High-Z
High-Z
High-Z
Off
Off
LPC Interface
LAD[3:0]
LFRAME#
Main I/O
Main I/O
High
High
High
High
High
Off
Off
High
Off
Off
Intel^® 82801CA ICH3-S Datasheet
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