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82801CA Datasheet, PDF (263/521 Pages) Intel Corporation – I/O Controller Hub 3-S (ICH3-S) | |||
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Hub Interface to PCI Bridge Registers (D30:F0)
8.1.5
8.1.6
8.1.7
8.1.8
REVIDâRevision ID Register (HUB-PCIâD30:F0)
Offset Address: 08h
Default Value: See Note
Attribute:
Size:
RO
8 bits
Bit
Description
7:0
Revision Identification ValueâRO. 8-bit value that indicates the revision number for the ICH3 hub
interface to PCI bridge.
NOTE: Refer to the Specification Update for the Revision ID.
SCCâSub Class Code Register (HUB-PCIâD30:F0)
Offset Address: 0Ah
Default Value: 04h
Attribute:
Size:
RO
8 bits
Bit
Description
7:0
Sub Class CodeâRO. 8-bit value that indicates the category of bridge for the ICH3 hub interface to
PCI bridge. The code is 04h indicating a PCI-to-PCI bridge.
BCCâBase-Class Code Register (HUB-PCIâD30:F0)
Offset Address: 0Bh
Default Value: 06h
Attribute:
Size:
RO
8 bits
Bit
Description
7:0
Base Class CodeâRO. 8-bit value that indicates the type of device for the ICH3 hub interface to PCI
bridge. The code is 06h indicating a bridge device.
PMLTâPrimary Master Latency Timer Register
(HUB-PCIâD30:F0)
Offset Address: 0Dh
Default Value: 00h
This register does not apply to hub interface.
Attribute:
Size:
RO
8 bits
Bit
Description
7:3 Master Latency Timer Count (MLTC). Not implemented.
2:0 Reserved.
Intel® 82801CA ICH3-S Datasheet
263
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