82801CA Datasheet, PDF (211/521 Pages) Intel Corporation – I/O Controller Hub 3-S (ICH3-S)

Functional Description
5.17.6.3
Format of Host Notify Command
The ICH3 tracks and responds to the standard Host Notify command as specified in the SMBus 2.0
specification. The host address for this command is fixed to 0001000b. If the ICH3 already has
data for a previously-received host notify command which has not been serviced yet by the host
software (as indicated by the HOST_NOTIFY_STS bit), then it will NACK following the host
address byte of the protocol. This allows the host to communicate non-acceptance to the master and
retain the host notify address and data values for the previous cycle until host software completely
services the interrupt.
Note: Host software must always clear the HOST_NOTIFY_STS bit after completing any necessary
reads of the address and data registers.
Table 5-96 shows the Host Notify format.
Table 5-96. Host Notify Format
Bit
Description
Driven by
1 Start
External Master
2–8 SMB Host Address–7 bits External Master
9 Write
External Master
10 ACK (or NACK)
ICH3
11–17 Device Address – 7 bits External Master
18 Unused–Always 0
19 ACK
20–27 Data Byte Low–8 bits
28 ACK
29–36 Data Byte High–8 bits
37 ACK
38 Stop
External Master
ICH3
External Master
ICH3
External Master
ICH3
External Master
Comment
Always 0001_000
Always 0
ICH3 NACKs if
HOST_NOTIFY_STS is 1
Indicates the address of the master;
loaded into the notify device address
register
7-bit-only address; this bit is inserted
to complete the byte
Loaded into the notify Data Low Byte
Register
Loaded into the notify Data High
Byte Register
Intel^® 82801CA ICH3-S Datasheet
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