82801CA Datasheet, PDF (11/521 Pages) Intel Corporation – I/O Controller Hub 3-S (ICH3-S)

5.18.1.4 Output Slot 2: Command Data Port.................................217
5.18.1.5 Output Slot 3: PCM Playback Left Channel.....................217
5.18.1.6 Output Slot 4: PCM Playback Right Channel ..................217
5.18.1.7 Output Slot 5: Modem Codec ..........................................217
5.18.1.8 Output Slot 6: PCM Playback Center Front Channel ......217
5.18.1.9 Output Slots 7–8: PCM Playback Left and Right
Rear Channels.................................................................218
5.18.1.10 Output Slot 9: Playback SubWoofer Channel..................218
5.18.1.11 Output Slots 10–11: Reserved ........................................218
5.18.1.12 Output Slot 12: I/O Control ..............................................218
5.18.1.13 AC-Link Input Frame (SDIN) ...........................................219
5.18.1.14 Input Slot 0: Tag Phase ...................................................219
5.18.1.15 Input Slot 1: Status Address Port / Slot Request Bits......220
5.18.1.16 Input Slot 2: Status Data Port ..........................................220
5.18.1.17 Input Slot 3: PCM Record Left Channel ..........................221
5.18.1.18 Input Slot 4: PCM Record Right Channel ........................221
5.18.1.19 Input Slot 5: Modem Line.................................................221
5.18.1.20 Input Slot 6: Optional Dedicated Microphone
Record Data ....................................................................221
5.18.1.21 Input Slots 7–11: Reserved .............................................221
5.18.1.22 Input Slot 12: I/O status ...................................................221
5.18.1.23 Register Access...............................................................222
5.18.2 AC-Link Low Power Mode ..............................................................223
5.18.2.1 External Wake Event .......................................................224
5.18.3 AC ’97 Cold Reset ..........................................................................224
5.18.4 AC ’97 Warm Reset ........................................................................224
5.18.5 System Reset..................................................................................225
6
Register and Memory Mapping ...................................................................227
6.1 PCI Devices and Functions..........................................................................228
6.2 PCI Configuration Map.................................................................................229
6.3 I/O Map ........................................................................................................230
6.3.1 Fixed I/O Address Ranges..............................................................230
6.3.2 Variable I/O Decode Ranges ..........................................................232
6.4 Memory Map ................................................................................................233
6.4.1 Boot-Block Update Scheme............................................................234
7
LAN Controller Registers (B1:D8:F0) .......................................................235
7.1 PCI Configuration Registers (B1:D8:F0)......................................................235
7.1.1 VID—Vendor ID Register (LAN Controller—B1:D8:F0) ..................236
7.1.2 DID—Device ID Register (LAN Controller—B1:D8:F0) ..................236
7.1.3 PCICMD—PCI Command Register (LAN Controller—B1:D8:F0) ..236
7.1.4 PCISTS—PCI Status Register (LAN Controller—B1:D8:F0) ..........237
7.1.5 REVID—Revision ID Register (LAN Controller—B1:D8:F0) ...........237
7.1.6 SCC—Sub Class Code Register (LAN Controller—B1:D8:F0).......238
7.1.7 BCC—Base Class Code Register (LAN Controller—B1:D8:F0) .....238
7.1.8 CLS—Cache Line Size Register (LAN Controller—B1:D8:F0) .......238
7.1.9 PMLT—PCI Master Latency Timer Register
(LAN Controller—B1:D8:F0) ...........................................................238
7.1.10 HEADTYP—Header Type Register (LAN Controller—B1:D8:F0) ..239
7.1.11 CSR_MEM_BASE CSR—Memory-Mapped Base
Address Register (LAN Controller—B1:D8:F0)...............................239
7.1.12 CSR_IO_BASE—CSR I/O-Mapped Base Address Register
(LAN Controller—B1:D8:F0) ...........................................................239
Intel^® 82801CA ICH3-S Datasheet
11