82801CA Datasheet, PDF (139/521 Pages) Intel Corporation – I/O Controller Hub 3-S (ICH3-S)

Functional Description
Table 5-38. Causes of SMI# and SCI
Cause
SCI
BIOS_RLS written to
Yes
GBL_RLS written to
No
Write to B2h Register
No
Periodic timer expires
No
64 ms timer expires
No
Legacy USB logic
No
Serial IRQ SMI reported
No
Device monitors match address
No
in its range
SMBus Host Controller
No
SMBus Slave SMI message
No
SMBus SMBALERT# signal
active
No
SMBus Host Notify message
received
No
Access microcontroller 62h/66h
No
SLP_EN bit written to 1
No
SMI
Additional Enables
No GBL_EN=1
Yes BIOS_EN=1
Yes none
Yes PERIODIC_EN=1
Yes SWSMI_TMR_EN=1
Yes LEGACY_USB_EN=1
Yes none
Yes DEV[n]_TRAP_EN=1
Yes
SMB_SMI_EN
Host Controller Enabled
Yes none
Where Reported
GBL_STS
BIOS_STS
APM_STS
PERIODIC_STS
SWSMI_TMR_STS
LEGACY_USB_STS
SERIRQ_SMI_STS
DEVMON_STS,
DEV[n]_TRAP_STS
SMBus host status reg.
SMBUS_SMI_STS
Yes none
SMBUS_SMI_STS
Yes
HOST_NOTIFY_INTREN
SMBUS_SMI_STS
HOST_NOTIFY_STS
Yes MCSMI_EN
MCSMI_STS
Yes SMI_ON_SLP_EN=1
SMI_ON_SLP_EN_STS
Notes on causes of SCI and SMI:
1. SCI_EN must be 1 to enable SCI. SCI_EN must be 0 to enable SMI
2. SCI can be routed to cause interrupt 9:11 or 20:23 (20:23 only available in APIC mode)
3. GBL_SMI_EN must be 1 to enable SMI
4. EOS must be written to 1 to re-enable SMI for the next one
Intel^® 82801CA ICH3-S Datasheet
139