82801CA Datasheet, PDF (138/521 Pages) Intel Corporation – I/O Controller Hub 3-S (ICH3-S)

Functional Description
In systems using the APIC, the SCI can be routed to interrupts 9, 10, 11, 20, 21, 22, or 23. The
interrupt polarity changes depending on whether it is on an interrupt shareable with a PIRQ or not;
(see Section 9.1.11 ACPI Control Register for details.) The interrupt will remain asserted until all
SCI sources are removed.”
Table 5-38 shows which events can cause an SMI# and SCI. Note that some events can be
programmed to cause either an SMI# or SCI. The usage of the event for SCI (instead of SMI#) is
typically associated with an ACPI-based system. Each SMI# or SCI source has a corresponding
enable and status bit.
Table 5-38. Causes of SMI# and SCI
Cause
SCI
PME#
Yes
PME_B0 (internal EHCI
controller)
Yes
Power Button Press
Yes
RTC Alarm
Yes
Ring Indicate
Yes
AC ’97 wakes
Yes
USB#1 wakes
Yes
USB#2 wakes
Yes
USB#3 wakes
Yes
THRM# pin active
Yes
ACPI Timer overflow (2.34 sec.) Yes
Any GPI
Yes
TCO SCI Logic
Yes
TCO SCI message from MCH
Yes
TCO SMI Logic
No
TCO SMI -
No
Year 2000 Rollover
TCO SMI -
No
TCO TIMEROUT
TCO SMI–OS writes to
No
TCO_DAT_IN Register
TCO SMI -
No
Message from MCH
TCO SMI–NMI occurred
No
(and NMIs mapped to SMI)
TCO SMI -
No
INTRUDER# signal goes active
TCO SMI–Change of the
No
BIOSWP bit from 0 to 1
TCO SMI -
No
Write attempted to BIOS
SMI
Additional Enables
Yes PME_EN=1
Yes PME_B0_EN=1
Yes PWRBTN_EN=1
Yes RTC_EN=1
Yes RI_EN=1
Yes AC97_EN=1
Yes USB1_EN=1
Yes USB2_EN=1
Yes USB3_EN=1
Yes THRM_EN=1
Yes TMROF_EN=1
GPI[x]_Route=10 (SCI)
Yes GPI[x]_Route=01 (SMI)
GPE1[x]_EN=1
No TCOSCI_EN=1
No none
Yes TCO_EN=1
Yes none
Yes none
Yes none
Yes none
Yes NMI2SMI_EN=1
Yes INTRD_SEL=10
Yes BLD=1
Yes BIOSWP=1
Where Reported
PME_STS
PME_B0_STS
PWRBTN_STS
RTC_STS
RI_STS
AC97_STS
USB1_STS
USB2_STS
USB3_STS
THRM_STS
TMROF_STS
GPI[x]_STS
GPE1_STS
TCOSCI_STS
MCHSCI_STS
TCO_STS
NEWCENTURY_STS
TIMEOUT
OS_TCO_SMI
MCHSMI_STS
NMI2SMI_STS
INTRD_DET
BIOSWR_STS
BIOSWR_STS
138
Intel^® 82801CA ICH3-S Datasheet