82801CA Datasheet, PDF (517/521 Pages) Intel Corporation – I/O Controller Hub 3-S (ICH3-S)

Register Bit Index
FC Paused ........................................................... 253
FC Paused Low ................................................... 253
FCP Mask............................................................ 247
FDD Decode Range ............................................ 290
FDD_LPC_EN.................................................... 293
FIFO Error Interrupt Enable (FEIE) ........... 426, 442
FIFO Error (FIFOE).................................... 424, 440
Flow Control Pause (FCP) .................................. 246
Flow Control Threshold...................................... 253
Force Global Resume (FGR) .............................. 390
Force Thermal Throttling (FORCE_THTL)....... 341
FR Mask.............................................................. 247
Frame List Current Index/Frame Number .......... 394
Frame Received (FR).......................................... 246
Full Reset (FULL_RST) ..................................... 329
FWH_C0_EN.............................................. 291, 296
FWH_C0_IDSEL................................................ 294
FWH_C8_EN.............................................. 291, 296
FWH_C8_IDSEL................................................ 294
FWH_D0_EN ............................................. 291, 296
FWH_D0_IDSEL ............................................... 294
FWH_D8_EN ............................................. 291, 296
FWH_D8_IDSEL ....................................... 294, 295
FWH_E0_EN...................................................... 291
FWH_E0_IDSEL........................................ 294, 295
FWH_E8_EN...................................................... 291
FWH_E8_IDSEL........................................ 294, 295
FWH_F0_EN ...................................................... 291
FWH_F0_IDSEL ........................................ 294, 295
FWH_F8_EN ...................................................... 291
FWH_F8_IDSEL ................................................ 294
G
GAMEH_LPC_EN ............................................. 292
GAMEL_LPC_EN.............................................. 292
GBL_SMI_EN .................................................... 346
General Self-Test Result ..................................... 250
Generic Decode Range 1 Enable (GEN1_EN) ... 292
Generic I/O Decode Range 1 Base Address
(GEN1_BASE) ................................... 292
Generic I/O Decode Range 2 Base Address
(GEN2_BASE) ................................... 295
Generic I/O Decode Range 2 Enable
(GEN2_EN) ........................................ 295
Global Enable (GBL_EN)................................... 339
Global Release (GBL_RLS) ............................... 340
Global Reset (GRESET) ..................................... 390
Global Status (GBL _STS) ................................. 338
GPE0_STS .......................................................... 347
GPE1_STS .......................................................... 347
GPI Interrupt Enable (GIE)......................... 427, 443
GPI Status Change Interrupt (GSCI) .......... 429, 445
GPIO Enable (GPIO_EN)................................... 282
GPIO11_ALERT_DISABLE ............................. 356
GPIO(n)_SEL ..................................................... 361
GPIO_USE_SEL................................................. 360
GPIO_USE_SEL2(43:32)................................... 363
GPI(0) Route....................................................... 333
GPI(15) Route..................................................... 333
GPI(1) Route....................................................... 333
GPI(2) Route ....................................................... 333
GPI(n)_EN .......................................................... 345
GPI(n)_STS......................................................... 345
GP_BLINK(n)..................................................... 362
GP_INV(n) .......................................................... 362
GP_IO_SEL2(43:32)........................................... 363
GP_LVL2(43:32) ................................................ 363
GP_LVL(n) ......................................................... 361
H
HCHalted............................................................. 393
Header Type ........................ 239, 264, 279, 416, 434
Hide ISA Bridge (HIDE_ISA) ............................ 286
HIDE_DEV0 ....................................................... 270
HIDE_DEV1 ....................................................... 270
HIDE_DEV2 ....................................................... 270
HIDE_DEV3 ....................................................... 270
HIDE_DEV4 ....................................................... 270
HIDE_DEV5 ....................................................... 270
HIDE_DEV8 ....................................................... 270
Hole Enable (15 MB–16 MB)............................. 271
Host Controller Process Error ............................. 393
Host Controller Reset (HCRESET)..................... 391
Host System Error ............................................... 393
HOST_BUSY...................................................... 405
HOST_NOTIFY_INTREN ................................. 410
HOST_NOTIFY_STS......................................... 410
HOST_NOTIFY_WKEN.................................... 410
Hour Format (HOURFORM).............................. 325
HP_PCI_EN ........................................................ 271
HUBNMI_STS.................................................... 354
HUBSCI_STS ..................................................... 354
HUBSERR_STS ................................................. 354
HUBSMI_STS .................................................... 354
I
I²C ....................................................................... 203
I²C_EN ................................................................ 403
ICW4 Write Required (IC4)................................ 309
ICW/OCW Select................................................ 309
IDE Decode Enable (IDE)................................... 372
IDEP0_ACT_STS ............................................... 349
IDEP0_TRP_EN ................................................. 350
IDEP1_ACT_STS ............................................... 349
IDEP1_TRP_EN ................................................. 350
IDES0_ACT_STS ............................................... 349
IDES0_TRP_EN ................................................. 350
IDES1_ACT_STS ............................................... 349
IDES1_TRP_EN ................................................. 350
INIT_NOW ......................................................... 328
Interesting Packet ................................................ 254
Internal LAN Master Request Status
(LAN_MREQ_STS) ........................... 272
Internal PCI Master Request Status
(INT_MREQ_STS) ............................. 272
Interrupt............................................................... 379
Interrupt Enable................................................... 251
Interrupt Input Pin Polarity ................................. 320
Interrupt Level Select (L2, L1, L0) ..................... 312
517
Intel^® 82801CA ICH3-S Datasheet