82801CA Datasheet, PDF (382/521 Pages) Intel Corporation – I/O Controller Hub 3-S (ICH3-S)

USB 1.1 Controllers Registers
11.1.2
11.1.3
DID—Device Identification Register (USB—D29:F0/F1/F2)
Address Offset:
Default Value:
02–03h
Function 0: 2482h
Function 1: 2484h
Function 2: 2487h
Attribute:
Size:
RO
16 bits
Bit
Description
15:0
Device Identification Value—RO. This is a 16-bit value assigned to the ICH3 USB Host
Controllers.
CMD—Command Register (USB—D29:F0/F1/F2)
Address Offset:
Default Value:
04–05h
0000h
Attribute:
Size:
R/W
16 bits
Bit
15:10
9
8
7
6
5
4
3
2
1
0
Description
Reserved.
Fast Back to Back Enable (FBE)—RO. Hardwired to 0.
SERR# Enable (SERR_EN)—RO. Hardwired to 0.
Wait Cycle Control (WCC)—RO. Hardwired to 0.
Parity Error Response (PER)—RO. Hardwired to 0.
VGA Palette Snoop (VPS)—RO. Hardwired to 0.
Postable Memory Write Enable (PMWE)—RO. Hardwired to 0.
Special Cycle Enable (SCE)—RO. Hardwired to 0.
Bus Master Enable (BME)—RW.
0 = Disable.
1 = Enable. The ICH3 can act as a master on the PCI bus for USB transfers.
Memory Space Enable (MSE)—RO. Hardwired to 0.
I/O Space Enable (IOE)—RW. This bit controls access to the I/O space registers.
0 = Disable.
1 = Enable accesses to the USB I/O registers. The Base Address register for USB should be
programmed before this bit is set.
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Intel^® 82801CA ICH3-S Datasheet