82801CA Datasheet, PDF (275/521 Pages) Intel Corporation – I/O Controller Hub 3-S (ICH3-S)

LPC I/F Bridge Registers (D31:F0)
LPC I/F Bridge Registers (D31:F0)
9
The LPC Bridge function of the ICH3 resides in PCI Device 31:Function 0. This function contains
many other functional units, such as DMA and Interrupt Controllers, Timers, Power Management,
System Management, GPIO, RTC, and LPC Configuration Registers.
Registers and functions associated with other functional units (USB 1.1, IDE, etc.) are described in
their respective Sections.
9.1
PCI Configuration Registers (D31:F0)
Note: Registers that are not shown should be treated as Reserved (See Section 6.2 for details).
.
Table 9-1. PCI Configuration Map (LPC I/F—D31:F0)
Offset
00–01h
02–03h
04–05h
06–07h
08h
09h
0Ah
0Bh
0Eh
40–43h
44h
4E–4Fh
54h
58–5Bh
5Ch
60–63h
64h
68–6Bh
88h
8Ah
90–91h
A0–CFh
D0–D3h
D4–D7h
D8h
Mnemonic
Register Name
VID
DID
PCICMD
PCISTA
RID
PI
SCC
BCC
HEADT
PMBASE
ACPI_CNTL
BIOS_CNTL
TCO_CNTL
GPIO_BASE
GPIO_CNTL
PIRQ[n]_ROUT
SIRQ_CNTL
PIRQ[n]_ROUT
D31_ERR_CFG
D31_ERR_STS
PCI_DMA_C
GEN_CNTL
GEN_STA
RTC_CONF
Vendor ID
Device ID
PCI Command
PCI Device Status
Revision ID
Programming Interface
Sub Class Code
Base Class Code
Header Type
ACPI Base Address
ACPI Control
BIOS Control
TCO Control
GPIO Base Address
GPIO Control
PIRQ[A–D] Routing Control
Serial IRQ Control
PIRQ[E–H] Routing Control
Device 31 Error Configuration
Device 31 Error Status
PCI DMA Configuration
Power Management (See Section 9.8.1)
General Control
General Status
Real Time Clock Configuration
Default
8086h
2480h
000Fh
0280h
See Note 1
00h
01h
06h
80h
00000001h
00h
0000h
00h
00000001h
00h
80808080h
10h
80808080h
00h
00h
0000h
00000000h
00000F00h
00h
Type
RO
RO
R/W
R/W
RO
RO
RO
RO
RO
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Intel^® 82801CA ICH3-S Datasheet
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