82801CA Datasheet, PDF (506/521 Pages) Intel Corporation – I/O Controller Hub 3-S (ICH3-S)

Register Index
Table A-2. Intel^® ICH3 Fixed I/O Registers (Continued)
Register Name
Channel 4 DMA Base & Current
Address Register
Aliased at C0h
Channel 4 DMA Base & Current
Count Register
Aliased at C2h
Channel 5 DMA Base & Current
Address Register
Aliased at C4h
Channel 5 DMA Base & Current
Count Register
Aliased at C6h
Channel 6 DMA Base & Current
Address Register
Aliased at C8h
Channel 6 DMA Base & Current
Count Register
Aliased at CAh
Channel 7 DMA Base & Current
Address Register
Aliased at CCh
Channel 7 DMA Base & Current
Count Register
Aliased at CEh
Channel 4–7 DMA Command
Register
Channel 4–7 DMA Status Register
Aliased at D0h
Channel 4–7 DMA Write Single
Mask Register
Aliased at D4h
Channel 4–7 DMA Channel Mode
Register
Aliased at D6h
Channel 4–7 DMA Clear Byte
Pointer Register
Aliased at D8h
Channel 4–7 DMA Master Clear
Register
Aliased at DAh
Channel 4–7 DMA Clear Mask
Register
Aliased at DCh
Port
C0h
C1h
C2h
C3h
C4h
C5h
C6h
C7h
C8h
C9h
CAh
CBh
CCh
CDh
CEh
CFh
D0h
D1h
D4h
D5h
D6h
D7h
D8h
D9h
DAh
DBh
DCh
DEh
Datasheet Section and Location
Section 9.2.1, “DMABASE_CA—DMA Base and Current
Address Registers” on page 9-299
Section 9.2.2, “DMABASE_CC—DMA Base and Current
Count Registers” on page 9-300
Section 9.2.1, “DMABASE_CA—DMA Base and Current
Address Registers” on page 9-299
Section 9.2.2, “DMABASE_CC—DMA Base and Current
Count Registers” on page 9-300
Section 9.2.1, “DMABASE_CA—DMA Base and Current
Address Registers” on page 9-299
Section 9.2.2, “DMABASE_CC—DMA Base and Current
Count Registers” on page 9-300
Section 9.2.1, “DMABASE_CA—DMA Base and Current
Address Registers” on page 9-299
Section 9.2.2, “DMABASE_CC—DMA Base and Current
Count Registers” on page 9-300
Section 9.2.4, “DMACMD—DMA Command Register”
on page 9-301
Section 9.2.5, “DMASTA—DMA Status Register” on
page 9-301
Section 9.2.6, “DMA_WRSMSK—DMA Write Single
Mask Register” on page 9-302
Section 9.2.7, “DMACH_MODE—DMA Channel Mode
Register” on page 9-302
Section 9.2.8, “DMA Clear Byte Pointer Register” on
page 9-303
Section 9.2.9, “DMA Master Clear Register” on
page 9-303
Section 9.2.10, “DMA_CLMSK—DMA Clear Mask
Register” on page 9-303
506
Intel^® 82801CA ICH3-S Datasheet