82801CA Datasheet, PDF (231/521 Pages) Intel Corporation – I/O Controller Hub 3-S (ICH3-S)

Register and Memory Mapping
Table 6-3. Fixed I/O Ranges Decoded by Intel^® ICH3 (Continued)
I/O Address
70h
71h
72h
73h
74h
75h
76h
77h
80h
81h–83h
84h–86h
87h
88h
89h–8Bh
8Ch–8Eh
08Fh
90h–91h
92h
93h–9Fh
A0h–A1h
A4h–A5h
A8h–A9h
ACh–ADh
B0h–B1h
B2h–B3h
B4h–B5h
B8h–B9h
BCh–BDh
C0h–D1h
D2h–DDh
DEh–DFh
Read Target
RESERVED
RTC Controller
RTC Controller
RTC Controller
RTC Controller
RTC Controller
RTC Controller
RTC Controller
DMA Controller
DMA Controller
DMA Controller
DMA Controller
DMA Controller
DMA Controller
DMA Controller
DMA Controller
DMA Controller
Reset Generator
DMA Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Power Management
Interrupt Controller
Interrupt Controller
Interrupt Controller
DMA Controller
RESERVED
DMA Controller
F0h
See Note 3
170h–177h
1F0h–1F7h
376h
3F6h
4D0h–4D1h
CF9h
IDE Controller²
IDE Controller¹
IDE Controller²
IDE Controller¹
Interrupt Controller
Reset Generator
Write Target
NMI and RTC Controller
RTC Controller
NMI and RTC Controller
RTC Controller
NMI and RTC Controller
RTC Controller
NMI and RTC Controller
RTC Controller
DMA Controller and LPC or PCI
DMA Controller
DMA Controller and LPC or PCI
DMA Controller
DMA Controller and LPC or PCI
DMA Controller
DMA Controller and LPC or PCI
DMA Controller
DMA Controller
Reset Generator
DMA Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Power Management
Interrupt Controller
Interrupt Controller
Interrupt Controller
DMA Controller
DMA Controller
DMA Controller
FERR#/IGNNE# / Interrupt
Controller
IDE Controller²
IDE Controller¹
IDE Controller²
IDE Controller¹
Interrupt Controller
Reset Generator
Internal Unit
RTC
RTC
RTC
RTC
RTC
RTC
RTC
RTC
DMA
DMA
DMA
DMA
DMA
DMA
DMA
DMA
DMA
Processor I/F
DMA
Interrupt
Interrupt
Interrupt
Interrupt
Interrupt
Power Management
Interrupt
Interrupt
Interrupt
DMA
DMA
DMA
Processor I/F
Forwarded to IDE
Forwarded to IDE
Forwarded to IDE
Forwarded IDE
Interrupt
Processor I/F
NOTES:
1. Only if IDE Standard I/O space is enabled for Primary Channel and the IDE Controller is in legacy mode.
Otherwise, the target is PCI.
2. Only if IDE Standard I/O space is enabled for Secondary Channel and the IDE Controller is in legacy mode.
Otherwise, the target is PCI.
3. If POS_DEC_EN bit is enabled, reads from F0h will not be decoded by the ICH3. If POS_DEC_EN is not
enabled, reads from F0h will forward to LPC.
Intel^® 82801CA ICH3-S Datasheet
231