82801CA Datasheet, PDF (352/521 Pages) Intel Corporation – I/O Controller Hub 3-S (ICH3-S)

LPC I/F Bridge Registers (D31:F0)
9.9
System Management TCO Registers (D31:F0)
The TCO logic is accessed via registers mapped to the PCI configuration space
(Device 31:Function 0) and the system I/O space. For TCO PCI Configuration registers,
see LPC Device 31:Function 0 PCI Configuration registers.
9.9.1 TCO Register I/O Map
The TCO I/O registers reside in a 32-byte range pointed to by a TCOBASE value, which is,
ACPIBASE + 60h in the PCI configuration space. Table 9-11 shows the mapping of the registers
within that 32-byte range.
Table 9-11. TCO I/O Register Map
Offset
00h
01h
02h
03h
04h–05h
06h–07h
08h–09h
0Ah–0Bh
0Ch–0Dh
0Eh
0Fh
10h
11h–1Fh
Register Name: Function
TCO_RLD: TCO Timer Reload and Current Value
TCO_TMR: TCO Timer Initial Value
TCO_DAT_IN: TCO Data In
TCO_DAT_OUT: TCO Data Out
TCO1_STS: TCO Status
TCO2_STS: TCO Status
TCO1_CNT: TCO Control
TCO2_CNT: TCO Control
TCO_MESSAGE1, TCO_MESSAGE2: Used by BIOS to indicate POST/Boot
progress
TCO_WDSTATUS: Watchdog Status Register
Reserved
SW_IRQ_GEN: Software IRQ Generation Register
Reserved
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
R/W
RO
9.9.2
TCO1_RLD—TCO Timer Reload and Current Value Register
I/O Address:
Default Value:
Lockable:
TCOBASE +00h
0000h
No
Attribute:
Size:
Power Well:
R/W
8-bit
Core
Bit
Description
7:0
Reading this register will return the current count of the TCO timer. Writing any value to this register
will reload the timer to prevent the timeout. Bits 7:6 will always be 0.
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Intel^® 82801CA ICH3-S Datasheet