82801CA Datasheet, PDF (401/521 Pages) Intel Corporation – I/O Controller Hub 3-S (ICH3-S)

SMBus Controller Registers (D31:F3)
12.1.5
12.1.6
12.1.7
12.1.8
RID—Revision Identification Register (SMBUS—D31:F3)
Address Offset: 08h
Default Value: See Note
Attribute:
Size:
RO
8 Bits
Bit
Description
7:0
Revision Identification Value—RO.
NOTE: Refer to the Specification Update for the Revision ID.
SCC—Sub Class Code Register (SMBUS—D31:F3)
Address Offset: 0Ah
Default Value: 05h
Attributes:
Size:
RO
8 bits
Bit
Sub Class Code—RO.
7:0
05h = SM Bus serial controller.
Description
BCC—Base Class Code Register (SMBUS—D31:F3)
Address Offset: 0Bh
Default Value: 0Ch
Attributes:
Size:
RO
8 bits
Bit
Base Class Code—RO.
7:0
0Ch = Serial controller.
Description
SMB_BASE—SMBus Base Address Register
(SMBUS—D31:F3)
Address Offset: 20–23h
Default Value: 00000001h
Attribute:
Size:
R/W
32-bits
Bit
31:16
15:5
4:1
0
Description
Reserved—RO.
Base Address—R/W. Provides the 32 byte system I/O base address for the ICH3 SMB logic.
Reserved—RO.
I/O Space Indicator—RO. This read-only bit is always 1, indicating that the SMB logic is I/O
mapped.
Intel^® 82801CA ICH3-S Datasheet
401