82801CA Datasheet, PDF (498/521 Pages) Intel Corporation – I/O Controller Hub 3-S (ICH3-S)

Register Index
Table A-1. Intel^® ICH3 PCI Configuration Registers (Continued)
Register Name
ACPI Control
BIOS Control Register
TCO Control
GPIO Base Address Register
GPIO Control Register
PIRQ[A–D] Routing Control
Serial IRQ Control Register
PIRQ[E–H] Routing Control
Device 31 Error Configuration
Register
Device 31 Error Status Register
PCI DMA Configuration Registers
General Power Management
Configuration 1
General Power Management
Configuration 2
General Power Management
Configuration 3
GPI_ROUT
I/O Monitor Trap Forwarding
Enable Register
I/O Monitor [4:7] Trap Range
Registers
I/O Monitor [4:7] Trap Mask
Register
General Control
General Status
Real Time Clock Configuration
Offset
44h
4E–4Fh
54h
58–5Bh
5Ch
60–63h
64h
68–6Bh
88h
8Ah
90–91h
A0h
A2h
A4h
B8–BBh
C0h
C4h, C6h,
C8h, CAh
CCh
D0–D3h
D4–D7h
D8h
Datasheet Section and Location
Section 9.1.11, “ACPI_CNTL—ACPI Control Register
(LPC I/F—D31:F0)” on page 9-280
Section 9.1.12, “BIOS_CNTL Register (LPC I/F—
D31:F0)” on page 9-281
Section 9.1.13, “TCO_CNTL—TCO Control Register
(LPC I/F—D31:F0)” on page 9-281
Section 9.1.14, “GPIOBASE—GPIO Base Address
Register (LPC I/F—D31:F0)” on page 9-282
Section 9.1.15, “GPIO_CNTL—GPIO Control Register
(LPC I/F—D31:F0)” on page 9-282
Section 9.1.16, “PIRQ[n]_ROUT—PIRQ[A,B,C,D]
Routing Control Register (LPC I/F—D31:F0)” on
page 9-283
Section 9.1.17, “SERIRQ_CNTL—Serial IRQ Control
Register (LPC I/F—D31:F0)” on page 9-283
Section 9.1.18, “PIRQ[n]_ROUT—PIRQ[E,F,G,H]
Routing Control Register (LPC I/F—D31:F0)” on
page 9-284
Section 9.1.19, “D31_ERR_CFG—Device 31 Error
Configuration Register (LPC I/F—D31:F0)” on
page 9-284
Section 9.1.20, “D31_ERR_STS—Device 31 Error
Status Register (LPC I/F—D31:F0)” on page 9-285
Section 9.1.21, “PCI_DMA_CFG—PCI DMA
Configuration Register (LPC I/F—D31:F0)” on
page 9-285
Section 9.8.1.1, “GEN_PMCON_1—General PM
Configuration 1 Register (PM—D31:F0)” on page 9-331
Section 9.8.1.2, “GEN_PMCON_2—General PM
Configuration 2 Register (PM—D31:F0)” on page 9-331
Section 9.8.1.3, “GEN_PMCON_3—General PM
Configuration 3 Register (PM—D31:F0)” on page 9-332
Section 9.8.1.5, “GPI_ROUT—GPI Routing Control
Register (PM—D31:F0)” on page 9-333
Section 9.8.1.6, “TRP_FWD_EN—I/O Monitor Trap
Forwarding Enable Register (PM—D31:F0)” on
page 9-333
Section 9.8.1.7, “MON[n]_TRP_RNG—I/O Monitor [4:7]
Trap Range Register for Devices 4–7 (PM—D31:F0)” on
page 9-334
Section 9.8.1.8, “MON_TRP_MSK—I/O Monitor Trap
Range Mask Register for Devices 4-7 (PM—D31:F0)” on
page 9-334
Section 9.1.22, “GEN_CNTL—General Control Register
(LPC I/F—D31:F0)” on page 9-286
Section 9.1.23, “GEN_STA—General Status Register
(LPC I/F—D31:F0)” on page 9-288
Section 9.1.24, “RTC_CONF—RTC Configuration
Register (LPC I/F—D31:F0)” on page 9-289
498
Intel^® 82801CA ICH3-S Datasheet