82801CA Datasheet, PDF (79/521 Pages) Intel Corporation – I/O Controller Hub 3-S (ICH3-S)

Functional Description
Power States
The LAN Controller contains power management registers for PCI, and implements all four power
states as defined in the Power Management Network Device Class Reference Specification,
Revision 1.0. The four states, D0 through D3, vary from maximum power consumption at D0 to the
minimum power consumption at D3. PCI transactions are only allowed in the D0 state, except for
host accesses to the LAN Controller’s PCI configuration registers. The D1 and D2 power
management states enable intermediate power savings while providing the system wake-up
capabilities. In the D3 cold state, the LAN Controller can provide wake-up capabilities. Wake-up
indications from the LAN Controller are provided by the Power Management Event (PME#)
signal.
• D0 Power State
As defined in the Network Device Class Reference Specification, the device is fully functional
in the D0 power state. In this state, the LAN Controller receives full power and should be
providing full functionality. In the LAN Controller the D0 state is partitioned into two
substates, D0 Uninitialized (D0u) and D0 Active (D0a).
D0u is the LAN Controller’s initial power state following a PCI RST#. While in the D0u state,
the LAN Controller has PCI slave functionality to support its initialization by the host and
supports Wake on LAN mode. Initialization of the CSR, Memory, or I/O base address registers
in the PCI Configuration space switches the LAN Controller from the D0u state to the D0a
state.
In the D0a state, the LAN Controller provides its full functionality and consumes its nominal
power. In addition, the LAN Controller supports wake on link status change (see
Section 5.2.3.5). While it is active, the LAN Controller requires a nominal PCI clock signal (in
other words, a clock frequency greater than 16 MHz) for proper operation. The LAN
Controller supports a dynamic standby mode. In this mode, the LAN Controller is able to save
almost as much power as it does in the static power-down states. The transition to or from
standby is done dynamically by the LAN Controller and is transparent to the software.
• D1 Power State
In order for a device to meet the D1 power state requirements, as specified in the Advanced
Configuration and Power Interface (ACPI) Specification, Revision 1.0, it must not allow bus
transmission or interrupts; however, bus reception is allowed. Therefore, device context may
be lost and the LAN Controller does not initiate any PCI activity. In this state, the LAN
Controller responds only to PCI accesses to its configuration space and system wake-up
events.
The LAN Controller retains link integrity and monitors the link for any wake-up events such
as wake-up packets or link status change. Following a wake-up event, the LAN Controller
asserts the PME# signal.
• D2 Power State
The ACPI D2 power state is similar in functionality to the D1 power state. In addition to D1
functionality, the LAN Controller can provide a lower power mode with wake-on-link status
change capability. The LAN Controller may enter this mode if the link is down while the LAN
Controller is in the D2 state. In this state, the LAN Controller monitors the link for a transition
from an invalid to a valid link.
The sub-10 mA state due to an invalid link can be enabled or disabled by a configuration bit in
the Power Management Driver Register (PMDR). The LAN Controller will consume in D2
<10 mA regardless of the link status. It is the LAN Connect component that consumes much
less power during link down, hence LAN Controller in this state can consume <10 mA.
• D3 Power State
In the D3 power state, the LAN Controller has the same capabilities and consumes the same
amount of power as it does in the D2 state. However, it enables the PCI system to be in the B3
state. If the PCI system is in the B3 state (in other words, no PCI power is present), the LAN
Intel^® 82801CA ICH3-S Datasheet
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