82801CA Datasheet, PDF (115/521 Pages) Intel Corporation – I/O Controller Hub 3-S (ICH3-S)

Functional Description
5.8.3 APIC Bus Functional Description
5.8.3.1
Physical Characteristics of APIC
The APIC bus is a 3-wire synchronous bus connecting all I/O and local APICs. Two of these wires
are used for data transmission, and one wire is a clock. For bus arbitration, the APIC uses only one
of the data wires. The bus is logically a wire-OR and electrically an open-drain connection
providing for both bus use arbitration and arbitration for lowest priority. The APIC bus speed can
run from 16.67 MHz to 33 MHz.
5.8.3.2 APIC Bus Arbitration
The I/O APIC uses one wire arbitration to win bus ownership. A rotating priority scheme is used
for APIC bus arbitration. The winner of the arbitration becomes the lowest priority agent and
assumes an arbitration ID of 0. All other agents, except the agent whose arbitration ID is 15,
increment their Arbitration IDs by one. The agent whose ID was 15 will take the winner's
arbitration ID and will increment it by one. Arbitration IDs are changed only for messages that are
transmitted successfully (except for the Low Priority messages). A message is transmitted
successfully if no CS error or acceptance error was reported for that message.
An APIC agent can use two different priority schemes: Normal or EOI. EOI has the highest
priority. EOI priority is used to send EOI messages for level interrupts from a local APIC to an I/O
APIC. When an agent requests the bus with EOI priority, all other agents requesting the bus with
normal priorities will back off.
When ICH3 detects a bus idle condition on the APIC Bus, and it has an interrupt to send over the
APIC bus, it drives a start cycle to begin arbitration, by driving bit 0 to a 0 on an APICCLK rising
edge. It then samples bit 1. If bit 1 was a 0, then a local APIC started arbitration for an EOI
message on the same clock edge that the ICH3 started arbitration. The ICH3 has thus lost
arbitration and will stop driving the APIC bus.
If the ICH3 did not see an EOI message start, it will start transferring its arbitration ID, located in
bits [27:24] of its Arbitration ID Register (ARBID). Starting in Cycle 2, through Cycle 5, it will tri-
state bit 0, and drive bit 1 to a 0 if ARBID[27] is a 1. If ARBID[27] is a 0, it will also tri-state bit 1.
At the end of each cycle, the ICH3 will sample the state of Bit 1 on the APIC bus. If the ICH3 did
not drive bit 1 (ARBID[27] = 0), and it samples a 0, then another APIC agent started arbitration for
the APIC bus at the same time as the ICH3, and it has higher priority. The ICH3 will stop driving
the APIC bus. Table 5-18 describes the arbitration cycles.
Table 5-18. Arbitration Cycles
Cycle
1
2
3
4
5
Bit 1
EOI
NOT (ARBID[27])
NOT (ARBID[26])
NOT (ARBID[25])
NOT (ARBID[24])
Bit 0
0
1
1
1
1
Comment
Bit 1 = 1: Normal, Bit 1 = 0: EOI
Arbitration ID. If ICH3 samples a different value than it sent, it
lost arbitration.
Intel^® 82801CA ICH3-S Datasheet
115