SH7751 Datasheet, PDF (975/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

22. PCI Controller (PCIC)
22.2.13 PCI Configuration Register 15 (PCICONF15)
Bit:
Initial value:
PCI-R/W:
PP Bus-R/W:
31
MLAT7
0
R
R
30
MLAT6
0
R
R
29
MLAT5
0
R
R
28
MLAT4
0
R
R
27
MLAT3
0
R
R
26
MLAT2
0
R
R
25
MLAT1
0
R
R
24
MLAT0
0
R
R
Bit:
Initial value:
PCI-R/W:
PP Bus-R/W:
23
MGNT7
0
R
R
22
MGNT6
0
R
R
21
MGNT5
0
R
R
20
MGNT4
0
R
R
19
MGNT3
0
R
R
18
MGNT2
0
R
R
17
MGNT1
0
R
R
16
MGNT0
0
R
R
Bit:
Initial value:
PCI-R/W:
PP Bus-R/W:
15
IPIN7
0
R
R
14
IPIN6
0
R
R
13
IPIN5
0
R
R
12
IPIN4
0
R
R
11
IPIN3
0
R
R
10
IPIN2
0
R
R
9
IPIN1
0
R
R
8
IPIN0
1
R
R
Bit:
Initial value:
PCI-R/W:
PP Bus-R/W:
7
ILIN7
0
R/W
R/W
6
ILIN6
0
R/W
R/W
5
ILIN5
0
R/W
R/W
4
ILIN4
0
R/W
R/W
3
ILIN3
0
R/W
R/W
2
ILIN2
0
R/W
R/W
1
ILIN1
0
R/W
R/W
0
ILIN0
0
R/W
R/W
The PCI configuration register 15 (PCICONF15) is a 32-bit read/partial-write register that
accommodates the maximum latency, minimum grant, interrupt pin, and interrupt line PCI
configuration registers stipulated in the PCI local bus specifications. The interrupt pins used by
this LSI is read from bits 15 to 8. Bits 7 to 0 indicate to which of the interrupt request signal lines
of an interrupt controller the interrupt line is connected.
Bits 31 to 8 are fixed in hardware. Bits 7 to 0 can be written to from both the PP bus and PCI bus.
The PCICONF15 register is initialized to H'00000100 at a power-on reset and software reset.
Rev.4.00 Oct. 10, 2008 Page 877 of 1122
REJ09B0370-0400