SH7751 Datasheet, PDF (958/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

22. PCI Controller (PCIC)
Bit 23—High-Speed Back-To-Back Status (FBBC): Shows whether a high-speed back-to-back
transfer to a different target can be accepted when the PCIC is operating as a target.
Bit 23: FBBC
0
1
Description
The target does not have a high-speed back-to-back transaction function for
use with other targets
The target has a high-speed back-to-back transaction function for use with
other targets
(Initial value)
Bit 22—User Defined Function System (UDF): Shows whether user defined functions are
supported.
Bit 22: UDF
0
1
Description
This device does not support user functions
This device supports user functions
(Initial value)
Bit 21—66 MHz Operating Status (66M): Shows whether 66 MHz operation is supported.
Bit 21: 66M
0
1
Description
This device supports 33 MHz operation
This device supports 66 MHz operation
(Initial value)
Bit 20—PCI Power Management (PM): Shows whether the PCI power management is
supported.
Bit 20: PM
0
1
Description
Power management not supported
Power management supported
(Initial value)
Bits 19 to 10—Reserved: These bits always return 0 when read. Always write 0 to these bits.
Bit 9—High-Speed Back-To-Back Control (PBBE): Selects whether or not to allow high-speed
back-to-back control with different targets when privileged as the master.
Bit 9: PBBE
0
1
Description
Allows high-speed back-to-back control only with same target (Initial value)
Allows high-speed back-to-back control with different target (Not supported)
Rev.4.00 Oct. 10, 2008 Page 860 of 1122
REJ09B0370-0400