SH7751 Datasheet, PDF (70/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

20.3.7 Program Counter (PC) Value Saved .................................................................... 812
20.3.8 Contiguous A and B Settings for Sequential Conditions ..................................... 813
20.3.9 Usage Notes ......................................................................................................... 814
20.4 User Break Debug Support Function ................................................................................ 816
20.5 Examples of Use ............................................................................................................... 818
20.6 User Break Controller Stop Function................................................................................ 820
20.6.1 Transition to User Break Controller Stopped State.............................................. 820
20.6.2 Cancelling the User Break Controller Stopped State ........................................... 820
20.6.3 Examples of Stopping and Restarting the User Break Controller........................ 821
Section 21 High-performance User Debug Interface (H-UDI)............................. 823
21.1 Overview........................................................................................................................... 823
21.1.1 Features................................................................................................................ 823
21.1.2 Block Diagram..................................................................................................... 823
21.1.3 Pin Configuration................................................................................................. 825
21.1.4 Register Configuration......................................................................................... 826
21.2 Register Descriptions ........................................................................................................ 827
21.2.1 Instruction Register (SDIR) ................................................................................. 827
21.2.2 Data Register (SDDR) ......................................................................................... 828
21.2.3 Bypass Register (SDBPR) ................................................................................... 828
21.2.4 Interrupt Factor Register (SDINT)....................................................................... 829
21.2.5 Boundary Scan Register (SDBSR) ...................................................................... 829
21.3 Operation .......................................................................................................................... 843
21.3.1 TAP Control......................................................................................................... 843
21.3.2 H-UDI Reset ........................................................................................................ 844
21.3.3 H-UDI Interrupt ................................................................................................... 844
21.3.4 Boundary Scan (EXTEST, SAMPLE/PRELOAD, BYPASS) ............................ 845
21.4 Usage Notes ...................................................................................................................... 845
Section 22 PCI Controller (PCIC) .................................................................................. 847
22.1 Overview........................................................................................................................... 847
22.1.1 Features................................................................................................................ 847
22.1.2 Block Diagram..................................................................................................... 848
22.1.3 Pin Configuration................................................................................................. 849
22.1.4 Register Configuration......................................................................................... 850
22.2 PCIC Register Descriptions .............................................................................................. 856
22.2.1 PCI Configuration Register 0 (PCICONF0) ........................................................ 856
22.2.2 PCI Configuration Register 1 (PCICONF1) ........................................................ 857
22.2.3 PCI Configuration Register 2 (PCICONF2) ........................................................ 863
22.2.4 PCI Configuration Register 3 (PCICONF3) ........................................................ 865
Rev.4.00 Oct. 10, 2008 Page lxx of xcviii
REJ09B0370-0400