SH7751 Datasheet, PDF (1103/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Stable input clock
EXTAL input
PLL output,
CKIO output
PLL synchronization
Internal clock
23. Electrical Characteristics
Reset or NMI
interrupt request
Stable input clock
t_PLL × 2
PLL synchronization
STATUS1–
STATUS0
Normal
Standby
Normal
Note: When an external clock is input from EXTAL.
Figure 23.9 PLL Synchronization Settling Time in Case of RESET, MRESET or NMI
Interrupt
Stable input clock
IRL3–IRL0
interrupt request
Stable input clock
EXTAL input
PLL output,
CKIO output
PLL synchronization
t_IRLSTB
t_PLL × 2 PLL synchronization
Internal clock
STATUS1–
STATUS0
Normal
Standby
Normal
Note: When an external clock is input from EXTAL.
Figure 23.10 PLL Synchronization Settling Time in Case of IRL Interrupt
Rev.4.00 Oct. 10, 2008 Page 1005 of 1122
REJ09B0370-0400