SH7751 Datasheet, PDF (1159/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

23. Electrical Characteristics
23.3.4 Peripheral Module Signal Timing
Table 23.23 Peripheral Module Signal Timing (1)
HD6417751
RBP240 (V)
HD6417751
RBG240 (V)
*²
HD6417751
RBP200 (V)
HD6417751
RBG200 (V)
*²
HD6417751
RF240 (V)
*²
HD6417751
RF200 (V)
*²
Module Item
Symbol Min Max Min Max Min Max Min Max Unit Figure Notes
TMU, Timer clock t_TCLKWH 4
—
RTC pulse width
(high)
4—
4—
4 — Pcyc*¹ 23.59
Timer clock t_TCLKWL 4
—
pulse width
(low)
4—
4—
4 — Pcyc*¹ 23.59
Timer clock t_TCLKr
rise time
— 0.8
— 0.8
— 0.8
— 0.8 Pcyc*¹ 23.59
Timer clock t_TCLKf
fall time
— 0.8
— 0.8
— 0.8
— 0.8 Pcyc*¹ 23.59
Oscillation t_ROSC
settling time
—3
—3
—3
—3 s
23.60
SCI
Input clock t_Scyc
4—
4—
4—
4 — Pcyc*¹ 23.61
cycle (asyn-
chronous)
Input clock t_Scyc
cycle (syn-
chronous)
6—
6—
6—
6 — Pcyc*¹ 23.61
Input clock t_SCKW
pulse width
0.4 0.6
0.4 0.6
0.4 0.6
0.4 0.6 t_Scyc 23.61
Input clock t_SCKr
rise time
— 0.8 — 0.8 — 0.8 — 0.8 Pcyc*¹ 23.61
Input clock fallt_SCKf
time
— 0.8 — 0.8 — 0.8 — 0.8 Pcyc*¹ 23.61
Transfer data t_TXD
delay time
1.5 5.3 1.5 5.3 1.5 6
1.5 6 ns 23.62
Receive data t_RXS
setup time
(synchronous)
16 —
16 —
16 — 16 — ns 23.62
Receive data t_RXH
hold time
(synchronous)
16 —
16 —
16 —
16 — ns 23.62
I/O
ports
Output data t_PORTD
delay time
1.5 5.3
1.5 5.3
1.5 6
1.5 6 ns 23.63
Input data t_PORTS 2
—
setup time
2.5 —
3.5 —
3.5 — ns 23.63
Input data
hold time
t_PORTH
1.5 —
1.5 —
1.5 —
1.5 — ns 23.63
Rev.4.00 Oct. 10, 2008 Page 1061 of 1122
REJ09B0370-0400