SH7751 Datasheet, PDF (876/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

19. Interrupt Controller (INTC)
Interrupt Source
INTEVT Interrupt Priority IPR (Bit
Code (Initial Value) Numbers)
Priority within
IPR Setting Unit
PCIC PCISERR
H'A00 15–0 (0)
INTPRI00 —
(3–0)
PCIERR
H'AE0 15–0 (0)
PCIPWDWN H'AC0
INTPRI00
(7–4)
High
PCIPWON H'AA0
PCIDMA0
H'A80
PCIDMA1
H'A60
PCIDMA2
H'A40
PCIDMA3
H'A20
Low
TMU3 TUNI3
H'B00 15–0 (0)
INTPRI00 —
(11–8)
TMU4 TUNI4
H'B80 15–0 (0)
INTPRI00 —
(15–12)
TMU0 TUNI0
H'400 15–0 (0)
IPRA (15–12) —
TMU1 TUNI1
H'420 15–0 (0)
IPRA (11–8) —
TMU2 TUNI2
H'440 15–0 (0)
IPRA (7–4) High
TICPI2
H'460
Low
RTC
ATI
H'480 15–0 (0)
IPRA (3–0) High
PRI
H'4A0
CUI
H'4C0
Low
SCI
ERI
H'4E0 15–0 (0)
IPRB (7–4) High
RXI
H'500
TXI
H'520
TEI
H'540
Low
SCIF ERI
H'700 15–0 (0)
IPRC (7–4) High
RXI
H'720
BRI
H'740
TXI
H'760
Low
WDT ITI
H'560 15–0 (0)
IPRB (15–12) —
REF
RCMI
H'580 15–0 (0)
IPRB (11–8) High
ROVI
H'5A0
Low
Legend:
TUNI0–TUNI4: Underflow interrupts
Default
Priority
High
Low
Rev.4.00 Oct. 10, 2008 Page 778 of 1122
REJ09B0370-0400