SH7751 Datasheet, PDF (450/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

13. Bus State Controller (BSC)
Bit 15—High Impedance Control (HIZMEM): Specifies the state of address and other signals
(A[25:0], BS, CSn, RD/WR, CE2A, CE2B) in standby mode.
Bit 15: HIZMEM
0
1
Description
The A[25:0], BS, CSn, RD/WR, CE2A, and CE2B signals go to high-
impedance (Hi-Z) in standby mode and when the bus is released
(Initial value)
The A[25:0], BS, CSn, RD/WR, CE2A, and CE2B signals drive in standby
mode
Bit 14—High Impedance Control (HIZCNT): Specifies the state of the RAS and CAS signals in
standby mode and when the bus is released.
Bit 14: HIZCNT
0
1
Description
The RAS, WEn, CASn/DQMn, and RD/CASS/FRAME signals go to high-
impedance (Hi-Z) in standby mode and when the bus is released
(Initial value)
The RAS, WEn, CASn/DQMn, and RD/CASS/FRAME signals drive in
standby mode and when the bus is released
Rev.4.00 Oct. 10, 2008 Page 352 of 1122
REJ09B0370-0400