SH7751 Datasheet, PDF (1057/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

22. PCI Controller (PCIC)
22.4 Endians
22.4.1 Internal Bus (Peripheral Bus) Interface for Peripheral Modules
The internal bus (peripheral bus) for the peripheral modules that write data from CPU to the PCIC
registers operates in big endians. On the other hand, PCI bus operates in little endian. Therefore,
big/little endian conversion is required in PIO transfer, as shown in figure 22.17. The PCIC
supports two endian conversion modes, the BYTESWAP bit of the PCI control register (PCICR)
switching between these modes.
Peripheral bus
32 bits
Big → little
32 bits
PCI bus
Big endian
32 bits
Little → big
32 bits
Little endian
Figure 22.17 Endian Conversion Modes for Peripheral Bus
1. Byte data boundary mode: Big/little endian conversion is performed on the assumption that all
data is on byte boundaries. (BYTESWAP = 1)
2. Word/longword (W/LW) boundary mode: Big/little endian conversion is performed according
to the size of data accessed. (BYTESWAP = 0)
Table 22.10 shows the access sizes supported by the conversion modes at the destination of
peripheral bus access. The local registers in the PCIC are always accessed in the word/longword
boundary mode regardless of the transfer mode.
Figure 22.18 shows the data alignment between peripheral bus and PCI bus in each boundary
mode.
Rev.4.00 Oct. 10, 2008 Page 959 of 1122
REJ09B0370-0400