SH7751 Datasheet, PDF (355/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Standby → Manual Reset
Oscillation stops Reset
9. Power-Down Modes
CKIO
RESET _(High)
MRESET^*
STATUS Normal
Standby Undefined
Reset
Normal
0–30 Bcyc
0–20 Bcyc
Note: * When standby mode is exited by means of a manual reset, a WDT count is not performed.
Hold MRESET low for the PLL oscillation stabilization time.
Figure 9.5 STATUS Output in Standby → Manual Reset Sequence
9.9.3 In Exit from Sleep Mode
Sleep → Interrupt
Interrupt request
CKIO
STATUS Normal
Sleep
Normal
Figure 9.6 STATUS Output in Sleep → Interrupt Sequence
Rev.4.00 Oct. 10, 2008 Page 257 of 1122
REJ09B0370-0400