SH7751 Datasheet, PDF (1187/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

C. Mode Pin Settings
Appendix C Mode Pin Settings
The MD10–MD0 pin values are input in the event of a power-on reset via the RESET pin.
Clock Modes
Table C.1 Clock Operating Modes (SH7751)
External
Pin Combination
Frequency
(vs. Input Clock)
Clock
Operating
Mode
MD2
MD1
MD0
1/2
Frequency
Divider
CPU
PLL1 PLL2 Clock
Bus
Clock
Peripheral
Module
Clock
FRQCR
Initial Value
0
0
0
0
Off
On On 6
3/2 3/2
H'0E1A
1
1
Off
On On 6
1
1
H'0E23
2
1
0
On
On On 3
1
1/2
H'0E13
3
1
Off
On On 6
2
1
H'0E13
4
1
0
0
On
On On 3
3/2 3/4
H'0E0A
5
1
Off
On On 6
3
3/2
H'0E0A
6
1
0
Off
Off Off 1
1/2 1/2
H'0808
Notes: 1. The multiplication factor of 1/2 frequency divider is solely determined by the clock
operating mode.
2. For the ranges input clock frequency, see the description of the EXTAL clock input
frequency (f ) and the CKIO clock output (f ) in section 23.3.1, Clock and Control
EX
OP
Signal Timing.
Rev.4.00 Oct. 10, 2008 Page 1089 of 1122
REJ09B0370-0400