SH7751 Datasheet, PDF (231/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

4. Caches
QACR0 [4:2]: External address bits [28:26] corresponding to SQ0
QACR1 [4:2]: External address bits [28:26] corresponding to SQ1
External address bits [4:0] are always fixed at 0 since burst transfer starts at a 32-byte
boundary.
In this LSI, data transfer to a PCMCIA interface area is always performed using the SA and
TC bits in the PTEA register.
4.7.4 Determination of SQ Access Exception
Determination of an exception in a write to an SQ or transfer to external memory (PREF
instruction) is performed as follows. If an exception occurs in an SQ write, the SQ contents may
be corrupted in the SH7751 (see section 4.7.6, SQ Usage Notes), but the previous values of the SQ
contents are guaranteed in the SH7751R. If an exception occurs in transfer from an SQ to external
memory, the transfer to external memory will be aborted.
• When MMU is on
Operation is in accordance with the address translation information recorded in the UTLB, and
MMUCR.SQMD. Write type exception judgment is performed for writes to the SQs, and read
type for transfer from the SQs to external memory (PREF instruction), and a TLB miss
exception, protection violation exception, or initial page write exception is generated.
However, if SQ access is enabled, in privileged mode only, by MMUCR.SQMD, an address
error will be flagged in user mode even if address translation is successful.
• When MMU is off
Operation is in accordance with MMUCR.SQMD.
0: Privileged/user access possible
1: Privileged access possible
If the SQ area is accessed in user mode when MMUCR.SQMD is set to 1, an address error will
be flagged.
4.7.5 SQ Read (SH7751R only)
In the SH7751R, the SQ contents can be read by a load instruction for addresses H'FF001000 to
H'FF00103C in the P4 area in privileged mode. The access size is always longword.
[31:6]:
[5]:
[4:2]:
[1:0]:
H'FF001000 (store queue specification)
0/1 (0: SQ0 specification, 1: SQ1 specification)
LW specification (specification of longword position in SQ0 or SQ1)
00 (fixed to 0)
Rev.4.00 Oct. 10, 2008 Page 133 of 1122
REJ09B0370-0400