SH7751 Datasheet, PDF (26/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Item
Page
13.3.5 Synchronous 453
DRAM Interface
Figure 13.38 (2)
Synchronous DRAM
Mode Write Timing
(Mode Register Setting)
Changing the Burst 455
Length (SH7751R Only):
• Burst Read
Figure 13.39 Basic
Timing of a Burst Read
from Synchronous
DRAM (Burst Length =
8)
13.3.7 PCMCIA
465
Interface
Figure 13.45 Basic
Timing for PCMCIA
Memory Card Interface
Revision (See Manual for Details)
Figure amended
D31–D0
Figure amended
CKE
DACKn
(SA: IO ← memory)
Figure amended
WE1
(write)
D15–D0
(write)
Figure 13.46 Wait
466
Timing for PCMCIA
Memory Card Interface
Figure 13.48 Basic 468
Timing for PCMCIA I/O
Card Interface
Figure amended
RD
(read)
D15–D0
(read)
WE1
(write)
D15–D0
(write)
Figure amended
ICIOWR
(write)
D15–D0
(write)
Rev.4.00 Oct. 10, 2008 Page xxvi of xcviii
REJ09B0370-0400