SH7751 Datasheet, PDF (960/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

22. PCI Controller (PCIC)
Bit 3—Special Cycle Control (SPC): Shows whether special cycles are supported when the
PCIC is operating as a target.
Bit 3: SPC
0
1
Description
Ignore special cycle
Monitor special cycle (not supported)
(Initial value)
Bit 2—PCI Bus Master Control (BUM): Controls the bus master operation.
Bit 2: BUM
0
1
Description
Disable bus master operation
Enable bus master operation
(Initial value)
Bit 1—Memory Space Control (MES): Controls the access to the memory space when the PCIC
is operating as a target. When this bit is 0, all memory transfers to the PCIC are terminated by
master abort.
Bit 1: MES
0
1
Description
Disable access to memory space
Enable access to memory space
(Initial value)
Bit 0—I/O Space Control (IOS): Controls the access to the I/O space when the PCIC is
operating as a target. When this bit is 0, all I/O transfers to the PCIC are terminated by master
abort.
Bit 0: IOS
0
1
Description
Disable access to I/O space
Enable access to I/O space
(Initial value)
Rev.4.00 Oct. 10, 2008 Page 862 of 1122
REJ09B0370-0400