SH7751 Datasheet, PDF (354/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

9. Power-Down Modes
9.9.2 In Exit from Standby Mode
Standby → Interrupt
Oscillation stops
Interrupt request WDT overflow
CKIO
STATUS Normal
Standby
WDT count
Normal
Figure 9.3 STATUS Output in Standby → Interrupt Sequence
Standby → Power-On Reset
Oscillation stops Reset
CKIO
RESET*¹
STATUS Normal
Standby *²
Reset
Normal
0–10 Bcyc
0–30 Bcyc
Notes: 1. When standby mode is exited by means of a power-on reset, a WDT count is not
performed. Hold RESET low for the PLL oscillation stabilization time.
2. Undefined
Figure 9.4 STATUS Output in Standby → Power-On Reset Sequence
Rev.4.00 Oct. 10, 2008 Page 256 of 1122
REJ09B0370-0400