SH7751 Datasheet, PDF (66/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

14.4.1 Examples of Transfer between External Memory and an External Device
with DACK .......................................................................................................... 552
14.5 On-Demand Data Transfer Mode (DDT Mode)................................................................ 553
14.5.1 Operation ............................................................................................................. 553
14.5.2 Pins in DDT Mode............................................................................................... 555
14.5.3 Transfer Request Acceptance on Each Channel .................................................. 558
14.5.4 Notes on Use of DDT Module ............................................................................. 580
14.6 Configuration of the DMAC (SH7751R).......................................................................... 583
14.6.1 Block Diagram of the DMAC.............................................................................. 583
14.6.2 Pin Configuration (SH7751R) ............................................................................. 584
14.6.3 Register Configuration (SH7751R) ..................................................................... 585
14.7 Register Descriptions (SH7751R)..................................................................................... 588
14.7.1 DMA Source Address Registers 0−7 (SAR0−SAR7).......................................... 588
14.7.2 DMA Destination Address Registers 0–7 (DAR0–DAR7).................................. 588
14.7.3 DMA Transfer Count Registers 0−7 (DMATCR0−DMATCR7) ........................ 589
14.7.4 DMA Channel Control Registers 0−7 (CHCR0−CHCR7) .................................. 589
14.7.5 DMA Operation Register (DMAOR) .................................................................. 593
14.8 Operation (SH7751R) ....................................................................................................... 595
14.8.1 Channel Specification for a Normal DMA Transfer............................................ 595
14.8.2 Channel Specification for DDT-Mode DMA Transfer ........................................ 595
14.8.3 Transfer Channel Notification in DDT Mode ...................................................... 596
14.8.4 Clearing Request Queues by DTR Format........................................................... 597
14.8.5 Interrupt-Request Codes ...................................................................................... 597
14.9 Usage Notes ...................................................................................................................... 600
Section 15 Serial Communication Interface (SCI) .................................................... 603
15.1 Overview........................................................................................................................... 603
15.1.1 Features................................................................................................................ 603
15.1.2 Block Diagram..................................................................................................... 605
15.1.3 Pin Configuration................................................................................................. 606
15.1.4 Register Configuration......................................................................................... 606
15.2 Register Descriptions ........................................................................................................ 607
15.2.1 Receive Shift Register (SCRSR1)........................................................................ 607
15.2.2 Receive Data Register (SCRDR1) ....................................................................... 607
15.2.3 Transmit Shift Register (SCTSR1) ...................................................................... 608
15.2.4 Transmit Data Register (SCTDR1)...................................................................... 608
15.2.5 Serial Mode Register (SCSMR1)......................................................................... 609
15.2.6 Serial Control Register (SCSCR1)....................................................................... 611
15.2.7 Serial Status Register (SCSSR1).......................................................................... 615
15.2.8 Serial Port Register (SCSPTR1) .......................................................................... 619
Rev.4.00 Oct. 10, 2008 Page lxvi of xcviii
REJ09B0370-0400