SH7751 Datasheet, PDF(915/1224 Page) Renesas Technology Corp – 32-Bit RISC Microcomputer

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SH7751 Datasheet, PDF (915/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

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20. User Break Controller (UBC)

Exception/interrupt

generation

Hardware operation

SPC â PC

SSR â SR

SR.BL â B'1

SR.MD â B'1

SR.RB â B'1

Exception

EXPEVT â exception code

Exception/

interrupt/trap?

Interrupt

INTEVT â interrupt code

Trap

EXPEVT â H'160

TRA â TRAPA (imm)

SGR â R15

No

Yes

Reset exception?

Yes

(BRCR.UBDE == 1) &&

No

(user break exception)?

PC â DBR

PC â VBR + vector offset

PC â H'A0000000

Debug program

R15 â SGR

(STC instruction)

Exception handling routine

Execute RTE instruction

PC â SPC

SR â SSR

End of exception

operations

Figure 20.2 User Break Debug Support Function Flowchart

Rev.4.00 Oct. 10, 2008 Page 817 of 1122

REJ09B0370-0400

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