SH7751 Datasheet, PDF (504/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

13. Bus State Controller (BSC)
CKIO
A25–A0
CSn
RD/WR
RD
D31–D0
(read)
WEn
D31–D0
(write)
BS
T1
T2
RDY
DACKn
(SA: IO ← memory)
DACKn
(SA: IO → memory)
DACKn
(DA)
Legend:
SA: Single address DMA
DA: Dual address DMA
Figure 13.6 Basic Timing of SRAM Interface
Rev.4.00 Oct. 10, 2008 Page 406 of 1122
REJ09B0370-0400