SH7751 Datasheet, PDF (824/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

17. Smart Card Interface
Bit 2—Transmit End (TEND): The setting conditions for the TEND flag are as follows.
Bit 2: TEND
0
1
Description
Transmission in progress
[Clearing condition]
When 0 is written to TDRE after reading TDRE = 1
Transmission has been ended
[Setting conditions]
(Initial value)
• Power-on reset, manual reset, standby mode, or module standby
• When the TE bit in SCSCR1 is 0 and the FER/ERS bit is also 0
• When the GM bit in SCSMR1 is 0, and TDRE = 1 and FER/ERS = 0
(normal transmission) 2.5 etu after transmission of a 1-byte serial
character
• When the GM bit in SCSMR1 is 1, and TDRE = 1 and FER/ERS = 0
(normal transmission) 1.0 etu after transmission of a 1-byte serial
character
Note: etu: Elementary time unit (time for transfer of 1 bit)
Bits 1 and 0—Reserved: Not used with the smart card interface.
17.3 Operation
17.3.1 Overview
The main functions of the smart card interface are as follows.
• One frame consists of 8-bit data plus a parity bit.
• In transmission, a guard time of at least 2 etu (elementary time unit: the time for transfer of one
bit) is left between the end of the parity bit and the start of the next frame.
• If a parity error is detected during reception, a low error signal level is output for a 1-etu period
10.5 etu after the start bit.
• If an error signal is detected during transmission, the same data is transmitted automatically
after the elapse of 2 etu or longer.
• Only asynchronous communication is supported; there is no synchronous communication
function.
Rev.4.00 Oct. 10, 2008 Page 726 of 1122
REJ09B0370-0400