SH7751 Datasheet, PDF (831/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

17. Smart Card Interface
Table 17.7 Maximum Bit Rate at Various Frequencies (Smart Card Interface Mode)
Pck (MHz)
Maximum Bit Rate (bits/s)
N
n
7.1424
19200
0
0
10.00
26882
0
0
10.7136
28800
0
0
16.00
43010
0
0
20.00
53763
0
0
25.0
67204
0
0
30.0
80645
0
0
33.0
88710
0
0
50.0
67204
0
0
The bit rate error is given by the following equation:
Pck
Error (%) = _{1488 × 22n – 1 × B × (N + 1)} × 10⁶ – 1 × 100
Table 17.8 shows the relationship between the smart card interface transmit/receive clock register
settings and the output state.
Table 17.8 Register Settings and SCK Pin State
Register Values
SCK Pin
Setting SMIF GM CKE1 CKE0 Output
State
1*¹
1
0
0
0
Port
Determined by setting of SPB1IO
and SPB1DT bits in SCSPTR1
1
0
0
1
SCK (serial clock) output state
2*²
1
1
0
0
Low output Low-level output state
1
1
0
1
SCK (serial clock) output state
3*²
1
1
1
0
High output High-level output state
1
1
1
1
SCK (serial clock) output state
Notes: 1. The SCK output state changes as soon as the CKE0 bit setting is changed.
Clear the CKE1 bit to 0.
2. Stopping and starting the clock by changing the CKE0 bit setting does not affect the
clock duty cycle.
Rev.4.00 Oct. 10, 2008 Page 733 of 1122
REJ09B0370-0400