SH7751 Datasheet, PDF (1010/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

22. PCI Controller (PCIC)
Bit 5—Local Address Control (LAHOLD): Local address control during DMA transfer
Bit 5: LAHOLD
0
1
Description
Incremented
High address fixed (Address A[4:0] is incremented)
(Initial value)
Bit 4—Reserved: This bit always returns 0 when read. Always write 0 to this bit.
Bit 3—PCI Address Space Type (IOSEL): Type of PCI address space during transfer
Bit 3: IOSEL
0
1
Description
Memory space
I/O space
(Initial value)
Bit 2—Transfer Direction (DIR): Transfer direction during DMA transfer
Bit 2: DIR
0
1
Description
Transfer from PCI bus to local bus (SH bus)
Transfer from local bus (SH bus) to PCI bus
(Initial value)
Bit 1—Forced DMA Transfer Termination (DMASTOP): Forced termination of DMA transfer
Bit 1: DMASTOP
When writing
0
1
When reading
Description
Writing of 0 is ignored.
Forced termination of DMA transfer
When DMA transfer stops due to forced DMA transfer
termination, 1 is set
Bit 0—DMA Transfer Start Control (DMASTRT): Controls the starting of DMA transfer.
Bit 0: DMASTRT
When writing
0
1
When reading
0
1
Description
Ignored
Start
End of transfer
Busy (in transfer)
(Initial value)
Rev.4.00 Oct. 10, 2008 Page 912 of 1122
REJ09B0370-0400