SH7751 Datasheet, PDF (715/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

15. Serial Communication Interface (SCI)
Bit 4—Framing Error (FER): Indicates that a framing error occurred during reception in
asynchronous mode, causing abnormal termination.
Bit 4: FER
0
Description
Reception in progress, or reception has ended normally*¹ (Initial value)
[Clearing conditions]
• Power-on reset, manual reset, standby mode, or module standby
• When 0 is written to FER after reading FER = 1
1
A framing error occurred during reception
[Setting condition]
When the SCI checks whether the stop bit at the end of the receive data is 1
when reception ends, and the stop bit is 0*²
Notes: 1. The FER flag is not affected and retains its previous state when the RE bit in SCSCR1
is cleared to 0.
2. In 2-stop-bit mode, only the first stop bit is checked for a value of 1; the second stop bit
is not checked. If a framing error occurs, the receive data is transferred to SCRDR1 but
the RDRF flag is not set. Serial reception cannot be continued while the FER flag is set
to 1.
Bit 3—Parity Error (PER): Indicates that a parity error occurred during reception with parity
addition in asynchronous mode, causing abnormal termination.
Bit 3: PER
Description
0
Reception in progress, or reception has ended normally*¹ (Initial value)
[Clearing conditions]
• Power-on reset, manual reset, standby mode, or module standby
• When 0 is written to PER after reading PER = 1
1
A parity error occurred during reception*²
[Setting condition]
When, in reception, the number of 1-bits in the receive data plus the parity
bit does not match the parity setting (even or odd) specified by the O/E bit in
SCSMR1
Notes: 1. The PER flag is not affected and retains its previous state when the RE bit in SCSCR1
is cleared to 0.
2. If a parity error occurs, the receive data is transferred to SCRDR1 but the RDRF flag is
not set. Serial reception cannot be continued while the PER flag is set to 1.
Rev.4.00 Oct. 10, 2008 Page 617 of 1122
REJ09B0370-0400